IP Library Granted Patent US 11,863,056
Granted Patent B2
US 11,863,056 · App. 17/569,075 · Granted Jan 2, 2024

Apparatus and method for measuring low load current

Inventors: Min Sang Park (Yongin-si, KR); Dongjin Keum (Seoul, KR); Byoungmook Kim (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H02M1/0009H02M3/157H02M3/158
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Quick Facts
Patent No.
US 11,863,056
App. No.
17/569,075
Granted
Jan 2, 2024
Kind
B2
Abstract

An apparatus configured to measure a load current provided to a load of a switching converter includes a pulse generation circuit configured to generate a control pulse based on a power switch driving signal of the switching converter, a reference current generation circuit configured to generate a reference current based on the control pulse, a clock generation circuit configured to generate a clock signal based on the control pulse and the reference current, and a clock counter configured to count the number of cycles of the clock signal during a switching period of the switching converter. The reference current generation circuit is configured to adjust the reference current to compensate for a leakage current generated in the clock generation circuit during the switching period.

Claims (46)

1. An apparatus configured to measure a load current provided to a load of a switching converter, the apparatus comprising:

a pulse generation circuit configured to generate a control pulse based on a power switch driving signal of the switching converter;

a reference current generation circuit configured to generate a reference current based on the control pulse;

a clock generation circuit configured to generate a clock signal based on the control pulse and the reference current; and

a clock counter configured to count a number of cycles of the clock signal during a switching period of the switching converter,

wherein the reference current generation circuit is configured to adjust the reference current to compensate for a leakage current generated in the clock generation circuit during the switching period.

2. The apparatus of claim 1 , wherein the reference current generation circuit comprises an input compensation capacitor,

wherein the reference current generation circuit is configured to generate the reference current based on a reference voltage, is configured to charge the input compensation capacitor with the reference voltage in a section in which the control pulse is activated, and is configured to generate the reference voltage based on charges stored in the input compensation capacitor after the section in which the control pulse is activated.

3. The apparatus of claim 2 , wherein the reference current generation circuit comprises a first switch configured such that one end of the first switch is configured to receive an input current and the other end thereof is connected to the input compensation capacitor, and

the reference current generation circuit is configured to turn on the first switch in the section in which the control pulse is activated, and is configured to turn off the first switch such that a node at which the input compensation capacitor is connected to the first switch is floated in a section in which the control pulse is deactivated.

4. The apparatus of claim 3 , wherein the reference current generation circuit comprises a logic circuit configured to operate in a first mode in which the first switch is turned on or off depending on whether the control pulse is activated, based on the counted number of cycles of the clock signal or operate in a second mode in which the first switch is always turned on.

5. The apparatus of claim 1 , wherein the clock generation circuit comprises a first capacitor and a second capacitor and

wherein the clock generation circuit is configured to charge the first capacitor by the reference current in a section in which the control pulse is activated, and

is configured to charge the second capacitor by the reference current in a section in which the control pulse is deactivated.

6. The apparatus of claim 5 , wherein the clock generation circuit is configured to float the first capacitor in a section in which the control pulse is deactivated.

7. The apparatus of claim 6 , wherein the clock generation circuit comprises a first comparator connected to the first capacitor and the second capacitor, the first comparator being configured to output the clock signal.

8. The apparatus of claim 7 , wherein, in the clock generation circuit, the first comparator is configured to generate an activated clock signal when a second voltage of the second capacitor is higher than a first voltage of the first capacitor,

wherein the clock generation circuit comprises a second switch connected in parallel to the second capacitor, the second switch being configured to be turned on in response to the activated clock signal and discharge the second capacitor.

9. The apparatus of claim 1 , wherein the clock counter is configured to generate an output signal indicating a magnitude of the load current based on the switching period of the switching converter and the counted number of cycles of the clock signal.

10. The apparatus of claim 9 , wherein the output signal is output to the outside of the apparatus.

11. The apparatus of claim 1 , wherein the control pulse is activated in a period in which a first power switch or a second power switch of the switching converter is turned on.

12. A switching converter configured to generate an output voltage from an input voltage, the switching converter comprising:

an inductor and an output capacitor connected to an output node from which the output voltage is generated;

a first power switch and a second power switch configured to provide an inductor current to the inductor;

a switch driver configured to generate a power switch driving signal for controlling the first power switch and the second power switch; and

a load current meter configured to measure a load current provided to a load of the switching converter,

wherein the load current meter is configured to generate a control pulse based on the power switch driving signal of the switching converter, is configured to generate a reference current based on the control pulse, is configured to control the reference current to compensate for a leakage current generated in a clock generation circuit, is configured to generate a clock signal corresponding to the load current based on the control pulse and the reference current, and is configured to count a number of cycles of the clock signal during a switching period of the switching converter.

13. The switching converter of claim 12 , wherein the load current meter comprises an input compensation capacitor,

and is configured to generate the reference current based on a reference voltage, is configured to charge the input compensation capacitor with the reference voltage in a section in which the control pulse is activated, and is configured to generate the reference voltage based on charges with which the input compensation capacitor is charged, after the section in which the control pulse is activated.

14. The switching converter of claim 13 , wherein the load current meter comprises:

a first switch configured such that one end of the first switch is configured to receive an input current and the other end thereof is connected to the input compensation capacitor; and

a logic circuit configured to turn on the first switch in the section in which the control pulse is activated and turn off the first switch such that a node at which the input compensation capacitor is connected to the first switch is floated in a section in which the control pulse is deactivated.

15. The switching converter of claim 12 , wherein the clock generation circuit comprises a first capacitor and a second capacitor,

wherein the first capacitor is configured to be charged by the reference current in a section in which the control pulse is activated, and

the second capacitor is configured to be charged by the reference current in a section in which the control pulse is deactivated.

16. The switching converter of claim 15 , wherein the clock generation circuit is configured to float the first capacitor in the section in which the control pulse is deactivated.

17. The switching converter of claim 16 , wherein the clock generation circuit comprises a first comparator connected to the first capacitor and the second capacitor, the first comparator being configured to output the clock signal.

18. The switching converter of claim 17 , wherein, in the clock generation circuit, the first comparator is configured to generate an activated clock signal when a second voltage of the second capacitor is higher than a first voltage of the first capacitor,

wherein the clock generation circuit comprises a second switch connected in parallel to the second capacitor, the second switch being configured to be turned on in response to the activated clock signal and discharge the second capacitor.

19. The switching converter of claim 12 , wherein the load current meter is configured to generate an output signal indicating a magnitude of the load current based on the switching period of the switching converter and the counted number of cycles of the clock signal.

20. A method of measuring a load current to be provided to a load of a switching converter, the method comprising:

generating a control pulse based on a power switch driving signal of the switching converter;

generating a reference current based on the control pulse;

generating a clock signal based on the control pulse and the reference current; and

counting a number of cycles of the clock signal during a switching period of the switching converter,

wherein the generating of the reference current comprises adjusting the reference current to compensate for a leakage current caused in the generating of the clock signal during the switching period.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2022
From: PARK, MIN SANG; KEUM, DONGJIN; KIM, BYOUNGMOOK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 058729/0138 →
Priority Claims (1)
KR 10-2021-0025965 · Feb 25, 2021 · national
Continuity (1)
Related Publication 20220271660A1 · Aug 25, 2022