Mitigating communication bottlenecks during parameter exchange in data-parallel DNN training
An interconnect topology for communication between GPUs in a computing system is determined. A quantity of directed spanning trees are generated for transmitting data between the GPUs using the interconnect topology and packed. The directed spanning trees define the connections between GPUs that are to be utilized for the transmission and the amount of data to be transmitted on each connection. Program code is generated for implementing the data transfer defined by the directed spanning trees. When the program code is executed, the directed spanning trees are used to pipeline the transmission of chunks of data, such as model parameters used during data-parallel DNN training, between the GPUs. The program code can also determine an optimal chunk size for data to be transferred between the GPUs.
1. A computer-implemented method, comprising:
determining an interconnect topology for transmitting data between a plurality of graphical processing units (GPUs), the interconnect topology comprising an inter-GPU point-to-point topology and a shared interconnect topology;
packing a quantity of directed spanning trees corresponding to the interconnect topology for transmitting the data between the plurality of GPUs, wherein the directed spanning trees comprise data defining communication links between the GPUs and an amount of the data to be transmitted on the communication links, and wherein the quantity of directed spanning trees is selected to minimize the number of directed spanning trees and to maximize utilization of bandwidth available on the communication links; and
generating program code which, when executed, will cause the data to be transmitted between the GPUs based on the directed spanning trees, the program code configured to select a chunk size for chunks of the data to be transferred between the plurality of GPUs by testing throughput between the plurality of GPUs at a range of chunk sizes following a multiplicative increase, additive decrease scheme across iterations, and to pipeline transmission of the chunks of the data between the GPUs.
2. The computer-implemented method of claim 1 , wherein multiplicative weight update (MWU) is utilized to select the quantity of directed spanning trees.
3. The computer-implemented method of claim 1 , wherein the quantity of directed spanning trees is minimized utilizing an integer linear program (ILP).
4. A computer-readable storage medium having instructions stored thereupon which, when executed by a processor, cause the processor to:
determine an interconnect topology for transmitting data between a plurality of graphical processing units (GPUs), the interconnect topology comprising an inter-GPU point-to-point topology and a shared interconnect topology;
pack a quantity of directed spanning trees corresponding to the interconnect topology for transmitting the data between the plurality of GPUs, wherein the directed spanning trees comprise data defining communication links between the GPUs and an amount of the data to be transmitted on the communication links, and wherein the quantity of directed spanning trees is selected to minimize the number of directed spanning trees and to maximize utilization of bandwidth available on the communication links; and
generate program code which, when executed, will cause the data to be transmitted between the GPUs based on the directed spanning trees, the program code configured to select a chunk size for chunks of the data to be transferred between the plurality of GPUs by testing throughput between the plurality of GPUs at a range of chunk sizes following a multiplicative increase, additive decrease scheme across iterations, and to pipeline transmission of the chunks of the data between the GPUs.
5. The computer-readable storage medium of claim 4 , wherein multiplicative weight update (MWU) is utilized to select the quantity of directed spanning trees.
6. The computer-readable storage medium of claim 4 , wherein the quantity of directed spanning trees is minimized utilizing an integer linear program (ILP).
7. A computing system, comprising:
a processor; and
a computer-readable storage medium having instructions stored thereupon which, when executed by the processor, cause the processor to:
determine an interconnect topology for transmitting data between a plurality of graphical processing units (GPUs), the interconnect topology comprising an inter-GPU point-to-point topology and a shared interconnect topology;
pack a quantity of directed spanning trees corresponding to the interconnect topology for transmitting the data between the plurality of GPUs, wherein the directed spanning trees comprise data defining communication links between the GPUs and an amount of the data to be transmitted on the communication links, and wherein the quantity of directed spanning trees is selected to minimize the number of directed spanning trees and to maximize utilization of bandwidth available on the communication links; and
generate program code which, when executed, will cause the data to be transmitted between the GPUs based on the directed spanning trees, the program code configured to select a chunk size for chunks of the data to be transferred between the plurality of GPUs by testing throughput between the plurality of GPUs at a range of chunk sizes following a multiplicative increase, additive decrease scheme across iterations, and to pipeline transmission of the chunks of the data between the GPUs.
8. The computing system of claim 7 , wherein multiplicative weight update (MWU) is utilized to select the quantity of directed spanning trees.
9. The computing system of claim 7 , wherein the quantity of directed spanning trees is minimized utilizing an integer linear program (ILP).