IP Library › Granted Patent US 11,875,425
Granted Patent B2
US 11,875,425 · App. 17/134,904 · Granted Jan 16, 2024

Implementing heterogeneous wavefronts on a graphics processing unit (GPU)

Inventors: Sooraj Puthoor (Austin, TX); Bradford Beckmann (Bellevue, WA); Nuwan Jayasena (Santa Clara, CA); Anthony Gutierrez (Bellevue, WA)
Assignee: ADVANCED MICRO DEVICES, INC.
G06T1/20G06F9/30036G06F9/3836G06F9/3877G06F9/3887G06F9/545G06T2210/52
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Quick Facts
Patent No.
US 11,875,425
App. No.
17/134,904
Granted
Jan 16, 2024
Kind
B2
Abstract

Implementing heterogeneous wavefronts on a graphics processing unit (GPU) is disclosed. A scheduler assigns heterogeneous wavefronts for execution on a compute unit of a processing device. The heterogeneous wavefronts include different types of wavefronts such as vector compute wavefronts and service-level wavefronts that vary in resource requirements and instruction sets. As one example, heterogeneous wavefronts may include scalar wavefronts and vector compute wavefronts that execute on scalar units and vector units, respectively. Distinct sets of instructions are executed for the heterogeneous wavefronts on the compute unit. Heterogeneous wavefronts are processed in the same pipeline of the processing device.

Claims (42)

1. A method of implementing heterogeneous wavefronts on a graphics processing unit (GPU), the method comprising:

assigning heterogeneous wavefronts for execution on a compute unit of a processing device, wherein each of the heterogeneous wavefronts includes a plurality of work items; and

concurrently executing distinct sets of instructions for two or more different heterogeneous wavefronts on the compute unit, wherein an execution slot in a scheduling queue of the compute unit occupied by a particular wavefront of the two or more different heterogeneous wavefronts includes an identification of a wavefront type of the particular wavefront.

2. The method of claim 1 , wherein assigning heterogeneous wavefronts for execution on a compute unit of a processing device includes:

assigning a first wavefront of a first wavefront type for execution on the compute unit; and

assigning a second wavefront of a second wavefront type for execution on the compute unit.

3. The method of claim 2 , wherein the first wavefront type is a vector compute wavefront type and wherein the second wavefront type is a service-level wavefront type.

4. The method of claim 3 , wherein an execution slot occupied by a service-level wavefront is distinguished from an execution slot occupied by a vector compute wavefront in a scheduling queue of the compute unit.

5. The method of claim 1 , wherein concurrently executing distinct sets of instructions for the heterogeneous wavefronts on the compute unit includes:

executing a first set of instructions of a first wavefront on a single instruction multiple data (SIMD) unit of the compute unit; and

executing a second set of instructions of second wavefront entirely on a scalar unit of the compute unit.

6. The method of claim 5 , wherein the second wavefront includes processing-in-memory instructions.

7. The method of claim 1 further comprising allocating separate context storage spaces for two or more distinct types of wavefronts.

8. The method of claim 1 , wherein the heterogeneous wavefronts are embodied in separate instruction streams embedded in a single wavefront; and wherein the method further comprises synchronizing instructions in the separate instruction streams.

9. The method of claim 1 further comprising receiving a command packet for launching a scalar kernel on the processing device.

10. A graphics processing unit (GPU) for implementing heterogeneous wavefronts, the GPU comprising:

a workgroup manager; and

a compute unit;

the workgroup manager comprising logic configured to assign heterogeneous wavefronts for execution on the compute unit, wherein each of the heterogeneous wavefronts includes a plurality of work items; and

the compute unit comprising logic configured to concurrently execute distinct sets of instructions for two or more different heterogeneous wavefronts on the compute unit, wherein an execution slot in a scheduling queue of the compute unit occupied by a particular wavefront of the two or more different heterogeneous wavefronts includes an identification of a wavefront type of the particular wavefront.

11. The GPU of claim 10 , wherein assigning heterogeneous wavefronts for execution on a compute unit of a processing device includes:

assigning a first wavefront of a first wavefront type for execution on the compute unit; and

assigning a second wavefront of a second wavefront type for execution on the compute unit.

12. The GPU of claim 11 , wherein the first wavefront type is a vector compute wavefront type and wherein the second wavefront type is a service-level wavefront type.

13. The GPU of claim 10 , wherein concurrently executing distinct sets of instructions for the heterogeneous wavefronts on the compute unit includes:

executing a first set of instructions of a first wavefront on a single instruction multiple data (SIMD) unit of the compute unit; and

executing a second set of instructions of second wavefront entirely on a scalar unit of the compute unit.

14. The GPU of claim 10 , wherein the GPU is further configured to allocate separate context storage spaces for two or more distinct types of wavefronts.

15. The GPU of claim 10 , wherein the GPU is further configured to receive a command packet for launching a scalar kernel on the GPU.

16. A device for implementing heterogeneous wavefronts, the device comprising:

a host central processing unit (CPU); and

a graphics processing unit (GPU) coupled to the host CPU, wherein the GPU is configured to:

assign heterogeneous wavefronts for execution on a compute unit of a processing device, wherein each of the heterogeneous wavefronts includes a plurality of work items; and

concurrently execute distinct sets of instructions for two or more different heterogeneous wavefronts on the compute unit, wherein an execution slot in a scheduling queue of the compute unit occupied by a particular wavefront of the two or more different heterogeneous wavefronts includes an identification of a wavefront type of the particular wavefront.

17. The device of claim 16 , wherein assigning heterogeneous wavefronts for execution on a compute unit of a processing device includes:

assigning a first wavefront of a first wavefront type for execution on the compute unit; and

assigning a second wavefront of a second wavefront type for execution on the compute unit.

18. The device of claim 17 , wherein the first wavefront type is a vector compute wavefront type and wherein the second wavefront type is a service-level wavefront type.

19. The device of claim 16 , wherein concurrently executing distinct sets of instructions for the heterogeneous wavefronts on the compute unit includes:

executing a first set of instructions of a first wavefront on a single instruction multiple data (SIMD) unit of the compute unit; and

executing a second set of instructions of second wavefront entirely on a scalar unit of the compute unit.

20. The device of claim 16 , wherein the GPU is further configured to allocate separate context storage spaces for two or more distinct types of wavefronts.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2021
From: PUTHOOR, SOORAJ; BECKMANN, BRADFORD; JAYASENA, NUWAN; GUTIERREZ, ANTHONY
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 057152/0968 →
Continuity (1)
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