Image decoder and image decoding method capable of blending operation between partitions
An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.
1. An image decoder comprising:
circuitry; and
a memory coupled to the circuitry;
wherein the circuitry, in operation:
calculates first values of pixels of a first partition in a current block, using a first motion vector for the first partition;
calculates second values of pixels of a second partition in the current block, using a second motion vector for the second partition;
calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector;
calculates fourth values of the set of pixels, using the second motion vector;
weights the third values and the fourth values of the set of pixels; and
decodes the current block using the weighted third values and the weighted fourth values,
wherein only the third values and the fourth values of the set of pixels are weighted for the current block,
wherein a number of pixels in a row in the set of pixels is greater than two, and greater than two weights applied to the third values of the set of pixels increase along the row in a first direction, and greater than two weights applied to the fourth values of the set of pixels decrease along the row in the first direction.
2. An image decoder comprising:
circuitry; and
a memory coupled to the circuitry;
wherein the circuitry, in operation:
calculates first values of pixels of a first partition in a current block, using a first motion vector for the first partition;
calculates second values of pixels of a second partition in the current block, using a second motion vector for the second partition;
calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector;
calculates fourth values of the set of pixels, using the second motion vector;
weights the third values and the fourth values of the set of pixels; and
decodes the current block using the weighted third values and the weighted fourth values,
wherein only the third values and the fourth values of the set of pixels are weighted for the current block,
wherein a number of pixels in a column in the set of pixels is greater than two, and greater than two weights applied to the third values of the set of pixels increase along the column in a first direction, and greater than two weights applied to the fourth values of the set of pixels decrease along the column in the first direction.