IP Library Granted Patent US 11,877,525
Granted Patent B2
US 11,877,525 · App. 17/410,771 · Granted Jan 16, 2024

Storage device having a resistance change memory element and writing method thereof

Inventors: Takayuki Sasaki (Yokohama Kanagawa, JP); Yukihiro Nomura (Taito Tokyo, JP)
Assignee: Kioxia Corporation
H10N70/8828G11C13/0004G11C13/0069H10B63/24H10N70/231G11C2013/0083G11C2213/72
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Quick Facts
Patent No.
US 11,877,525
App. No.
17/410,771
Granted
Jan 16, 2024
Kind
B2
Abstract

A storage device includes a resistance change memory element including a first electrode, a second electrode, a resistance change layer between the first and second electrodes, including at least two elements selected from a group consisting of germanium (Ge), antimony (Sb), and tellurium (Te), and having a crystal structure with a c-axis oriented in a first direction from the first electrode toward the second electrode, and a first layer between the first electrode and the resistance change layer and including nitrogen (N) and at least one of silicon (Si) or germanium (Ge).

Claims (55)

1. A storage device, comprising:

a resistance change memory element including:

a first electrode,

a second electrode,

a resistance change layer between the first and second electrodes, including at least two elements selected from a group consisting of germanium (Ge), antimony (Sb), and tellurium (Te), and having a crystal structure with a c-axis oriented in a first direction from the first electrode toward the second electrode, and

a first layer between the first electrode and the resistance change layer and including nitrogen (N) and at least one of silicon (Si) or germanium (Ge).

2. The storage device according to claim 1 , wherein the resistance change memory element further includes a second layer between the second electrode and the resistance change layer and including nitrogen (N) and at least one of silicon (Si) or germanium (Ge).

3. The storage device according to claim 1 , wherein the resistance change layer includes at least one selected from an Sb 2 Te 3 layer, a GeTe layer, and a GeSb layer.

4. The storage device according to claim 1 , wherein the resistance change layer includes a plurality of Sb 2 Te 3 layers and GeTe layers that are alternately stacked along the first direction.

5. The storage device according to claim 1 , wherein the resistance change memory element further includes a third layer between the first electrode and the first layer and including an oxide or a nitride.

6. The storage device according to claim 5 , wherein the resistance change memory element further includes:

a second layer between the second electrode and the resistance change layer and including nitrogen (N) and at least one of silicon (Si) or germanium (Ge), and

a fourth layer between the second electrode and the second layer and including an oxide or a nitride.

7. The storage device according to claim 1 , wherein the resistance change memory element switches between a first resistance state and a second resistance state having a higher resistance value than the first resistance state.

8. The storage device according to claim 1 , further comprising:

a selector element connected in series to the resistance change memory element.

9. A storage device, comprising:

a resistance change memory element including:

a first electrode,

a second electrode,

a resistance change layer between the first and second electrodes and including at least two elements selected from a group consisting of germanium (Ge), antimony (Sb), and tellurium (Te), and

a first layer between the first electrode and the resistance change layer and including at least one of silicon (Si) or germanium (Ge); and

a signal application circuit configured to apply a first voltage having a first polarity opposite to a second polarity of a write voltage to the resistance change memory element before applying the write voltage to the resistance change memory element,

wherein the first layer further contains nitrogen (N).

10. The storage device according to claim 9 , wherein the resistance change layer includes a material having a crystal structure, a c-axis of which is oriented in a first direction from the first electrode toward the second electrode.

11. The storage device according to claim 9 , wherein the resistance change memory element further includes a second layer between the second electrode and the resistance change layer and including at least one of silicon (Si) or germanium (Ge).

12. The storage device according to claim 9 , wherein the signal application circuit is further configured to, before applying the write voltage, further apply a second voltage having the second polarity to the resistance change memory element.

13. The storage device according to claim 9 , wherein the signal application circuit is further configured to, before applying the write voltage, alternately apply voltages having the first polarity and voltages having the second polarity to the resistance change memory element.

14. The storage device according to claim 9 , wherein the resistance change memory element switches between a first resistance state and a second resistance state having a higher resistance value than the first resistance state in accordance with the write voltage.

15. The storage device according to claim 14 , wherein the resistance change memory element is switched to the first resistance state when the write voltage is applied.

16. The storage device according to claim 15 , wherein a waveform of the first voltage has a shape corresponding to a shape of a waveform of the write voltage.

17. The storage device according to claim 9 , further comprising:

a selector element connected in series to the resistance change memory element.

18. The storage device according to claim 9 , wherein the signal application circuit is configured to, before applying the write voltage, apply a third voltage lower than the first voltage and having the first polarity to the resistance change memory element.

19. A data writing method performed by a storage device that comprises a resistance change memory element including a first electrode, a second electrode, a resistance change layer between the first and second electrodes and including at least two elements selected from a group consisting of germanium (Ge), antimony (Sb), and tellurium (Te), and a first layer between the first electrode and the resistance change layer and including at least one of silicon (Si) or germanium (Ge), the method comprising:

applying a first voltage having a first polarity to the resistance change memory element; and

after applying the first voltage, applying a write voltage having a second polarity opposite to the first polarity to the resistance change memory element,

wherein the first layer further contains nitrogen (N).

20. A storage device, comprising:

a resistance change memory element including:

a first electrode,

a second electrode,

a resistance change layer between the first and second electrodes and including at least two elements selected from a group consisting of germanium (Ge), antimony (Sb), and tellurium (Te), and

a first layer between the first electrode and the resistance change layer and including at least one of silicon (Si) or germanium (Ge); and

a signal application circuit configured to apply a first voltage having a first polarity opposite to a second polarity of a write voltage to the resistance change memory element before applying the write voltage to the resistance change memory element,

wherein the resistance change memory element further includes a second layer between the second electrode and the resistance change layer and including at least one of silicon (Si) or germanium (Ge).

21. The storage device according to claim 20 , wherein the resistance change layer includes a material having a crystal structure, a c-axis of which is oriented in a first direction from the first electrode toward the second electrode.

22. The storage device according to claim 20 , wherein the signal application circuit is further configured to, before applying the write voltage, further apply a second voltage having the second polarity to the resistance change memory element.

23. The storage device according to claim 20 , wherein the signal application circuit is further configured to, before applying the write voltage, alternately apply voltages having the first polarity and voltages having the second polarity to the resistance change memory element.

24. The storage device according to claim 20 , wherein the resistance change memory element switches between a first resistance state and a second resistance state having a higher resistance value than the first resistance state in accordance with the write voltage.

25. The storage device according to claim 24 , wherein the resistance change memory element is switched to the first resistance state when the write voltage is applied.

26. The storage device according to claim 25 , wherein a waveform of the first voltage has a shape corresponding to a shape of a waveform of the write voltage.

27. The storage device according to claim 20 , further comprising:

a selector element connected in series to the resistance change memory element.

28. The storage device according to claim 20 , wherein the signal application circuit is configured to, before applying the write voltage, apply a third voltage lower than the first voltage and having the first polarity to the resistance change memory element.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 17, 2021
From: SASAKI, TAKAYUKI; NOMURA, YUKIHIRO
To: KIOXIA CORPORATION
Reel/Frame 058144/0357 →
Priority Claims (1)
JP 2021-048607 · Mar 23, 2021 · national
Continuity (1)
Related Publication 20220310918A1 · Sep 29, 2022