IP Library › Granted Patent US 11,887,967
Granted Patent B2
US 11,887,967 · App. 17/493,709 · Granted Jan 30, 2024

Semiconductor device package and method of manufacturing the same

Inventors: Shang-Ruei Wu (Kaohsiung, TW); Chien-Yuan Tseng (Kaohsiung, TW); Meng-Jen Wang (Kaohsiung, TW); Chen-Tsung Chang (Kaohsiung, TW); Chih-Fang Wang (Kaohsiung, TW); Cheng-Han Li (Kaohsiung, TW); Chien-Hao Chen (Kaohsiung, TW); An-Chi Tsao (Kaohsiung, TW); Per-Ju Chao (Kaohsiung, TW)
Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
H01L25/0657H01L21/02631H01L21/76838H01L23/3121
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Quick Facts
Patent No.
US 11,887,967
App. No.
17/493,709
Granted
Jan 30, 2024
Kind
B2
Abstract

A semiconductor device package includes a substrate, a connection structure, a first package body and a first electronic component. The substrate has a first surface and a second surface opposite to the first surface. The connection structure is disposed on the firs surface of the substrate. The first package body is disposed on the first surface of the substrate. The first package body covers the connection structure and exposes a portion of the connection structure. The first electronic component is disposed on the first package body and in contact with the portion of the connection structure exposed by the first package body.

Claims (49)

1. A semiconductor device package, comprising:

a substrate having a first surface and a second surface opposite to the first surface;

a connection structure disposed on the first surface of the substrate;

a package body disposed on the first surface of the substrate, the package body partially covering the connection structure, wherein a portion of the connection structure is exposed by the package body and configured to provide an external interconnection;

a first electronic component disposed on the second surface of the substrate,

wherein the first electronic component is exposed by the package body.

2. The semiconductor device package of claim 1 , wherein a portion of the second surface of the substrate is exposed by the package body.

3. A semiconductor device package, comprising:

a substrate having a first surface and a second surface opposite to the first surface;

a connection structure disposed on the first surface of the substrate;

a package body disposed on the first surface of the substrate, the package body partially covering the connection structure, wherein a portion of the connection structure is exposed by the package body and configured to provide an external interconnection;

a first electronic component disposed on the second surface of the substrate, wherein the connection structure is closer to an edge of the substrate compared with the first electronic component;

an active component disposed on the first surface of the substrate; and

a passive component disposed on the first surface of the substrate and between the active component and the connection structure from a cross-sectional view.

4. A semiconductor device package, comprising:

a substrate having a first surface and a second surface opposite to the first surface;

a connection structure disposed on the first surface of the substrate;

a package body disposed on the first surface of the substrate, the package body partially covering the connection structure, wherein a portion of the connection structure is exposed by the package body and configured to provide an external interconnection;

a first electronic component disposed on the second surface of the substrate; and

a second electronic component disposed on the package body and electrically connected to the portion of the connection structure.

5. The semiconductor device package of claim 4 , wherein the first electronic component is at least partially disposed under the connection structure.

6. The semiconductor device package of claim 4 , wherein a portion of a top surface of the package body is exposed by the second electronic component.

7. The semiconductor device package of claim 4 , wherein the first electronic component is at least partially disposed under the second electronic component.

8. A semiconductor device package, comprising:

a substrate having a first surface and a second surface opposite to the first surface;

a connection structure disposed on the first surface of the substrate;

a package body disposed on the first surface of the substrate, the package body partially covering the connection structure, wherein a portion of the connection structure is exposed by the package body;

a shielding layer disposed at a first side and a second side of the package body and exposing the portion of the connection structure; and

a first electronic component disposed on the second surface of the substrate,

wherein the first electronic component is exposed by the package body.

9. The semiconductor device package of claim 8 , wherein a portion of the second surface of the substrate is exposed by the package body.

10. The semiconductor device package of claim 8 , wherein the shielding layer is further disposed at a third side of the package body different from the first side and the second side of the package body.

11. The semiconductor device package of claim 8 , wherein the shielding layer further covers a lateral surface of the substrate extending between the first surface and the second surface of the substrate.

12. A semiconductor device package, comprising:

a substrate having a first surface and a second surface opposite to the first surface;

a connection structure disposed on the first surface of the substrate;

a package body disposed on the first surface of the substrate, the package body partially covering the connection structure, wherein a portion of the connection structure is exposed by the package body;

a shielding layer disposed at a first side and a second side of the package body and exposing the portion of the connection structure;

a first electronic component disposed on the second surface of the substrate; and

a second electronic component disposed on the package body and electrically connected to the portion of the connection structure.

13. The semiconductor device package of claim 12 , wherein a portion of a top surface of the package body is exposed by the second electronic component.

14. A semiconductor device package, comprising:

a substrate having a first surface and a second surface opposite to the first surface;

a connection structure disposed on the first surface of the substrate;

a package body disposed on the first surface of the substrate, the package body partially covering the connection structure, wherein a portion of the connection structure is exposed by the package body;

a shielding layer disposed at a first side and a second side of the package body and exposing the portion of the connection structure;

a first electronic component disposed on the second surface of the substrate, wherein the first electronic component is at least partially disposed under the connection structure;

an active component disposed on the first surface of the substrate; and

a passive component disposed on the first surface of the substrate and between the active component and the connection structure from a cross-sectional view.

Continuity (3)
Continuation 16779249 · Jan 31, 2020
Provisional Application 62799701 · Jan 31, 2019
Related Publication 20220028836A1 · Jan 27, 2022
Cited By (2)
US 12,580,126 US 12,614,677