IP Library › Granted Patent US 11,888,003
Granted Patent B2
US 11,888,003 · App. 17/039,128 · Granted Jan 30, 2024

Photodetector

Inventors: Akito Inoue (Osaka, JP); Yuki Sugiura (Kyoto, JP); Yutaka Hirose (Kyoto, JP)
Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
H01L27/1461H01L27/14603H01L27/14643H04N25/75
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Quick Facts
Patent No.
US 11,888,003
App. No.
17/039,128
Granted
Jan 30, 2024
Kind
B2
Abstract

A photodetector includes: a semiconductor substrate having a first main surface and a second main surface; a first semiconductor layer that is of a first conductivity type, and is included in the semiconductor substrate and closer to the first main surface than to the second main surface; a second semiconductor layer that is of a second conductivity type different from the first conductivity type, and is included in the semiconductor substrate and interposed between the first semiconductor layer and the second main surface; a multiplication region that causes avalanche multiplication to a charge generated in the semiconductor substrate through photoelectric conversion; a circuit region disposed alongside the first semiconductor layer in a direction parallel to the first main surface; at least one isolation transistor disposed in the circuit region; and an isolation region interposed between the first semiconductor layer and the circuit region.

Claims (62)

1. A photodetector, comprising:

a semiconductor substrate that has a first main surface and a second main surface opposed to the first main surface;

a first semiconductor layer that is of a first conductivity type, and is included in the semiconductor substrate and closer to the first main surface than to the second main surface;

a second semiconductor layer that is of a second conductivity type different from the first conductivity type, and is included in the semiconductor substrate and interposed between the first semiconductor layer and the second main surface;

a multiplication region that is included in the first semiconductor layer and the second semiconductor layer and causes avalanche multiplication to a charge generated in the semiconductor substrate through photoelectric conversion;

a circuit region that is disposed alongside the first semiconductor layer in a direction parallel to the first main surface;

an isolation transistor that is disposed in the circuit region, the isolation transistor comprising at least one isolation transistor;

an isolation region that is interposed between the first semiconductor layer and the circuit region;

a first contact that is disposed on the first semiconductor layer, the first contact comprising at least one first contact;

a first line that connects the first contact to a source of the isolation transistor; and

a readout circuit that is connected to a drain of the isolation transistor and reads a first charge included in the charge generated in the semiconductor substrate through photoelectric conversion.

2. The photodetector according to claim 1 , further comprising

a second contact that is disposed on the second main surface,

wherein the charge generated between the first semiconductor layer and the second semiconductor layer through photoelectric conversion includes a second charge that is opposite in polarity to the first charge and that flows outside the semiconductor substrate via the second contact.

3. The photodetector according to claim 1 ,

wherein the isolation region separates the first semiconductor layer and the circuit region according to a potential.

4. The photodetector according to claim 3 ,

wherein the potential is greater than a voltage change in the first semiconductor layer caused by the charge generated through the avalanche multiplication.

5. The photodetector according to claim 1 ,

wherein the isolation region is depleted.

6. The photodetector according to claim 1 ,

wherein a region including the first semiconductor layer and the isolation region includes no shallow trench isolation (STI) nor contact.

7. The photodetector according to claim 1 ,

wherein an impurity concentration of the second semiconductor layer increases with depth.

8. The photodetector according to claim 7 ,

wherein an impurity concentration distribution of the second semiconductor layer is roughly constant in the direction parallel to the first main surface.

9. The photodetector according to claim 7 , further comprising

a first well that is disposed in the circuit region, the first well comprising at least one first well,

wherein the first well is of the first conductivity type and has a lower impurity concentration than the first semiconductor layer at an interface between the first well and the second semiconductor layer.

10. The photodetector according to claim 9 ,

wherein the first well is disposed further toward the second main surface than the first semiconductor layer is.

11. The photodetector according to claim 7 ,

wherein a gradient of an impurity concentration distribution of the second semiconductor layer is steeper toward the second main surface from the first main surface.

12. The photodetector according to claim 1 ,

wherein the second semiconductor layer is disposed to cover a whole surface of the first main surface.

13. The photodetector according to claim 1 ,

wherein an interface between the first semiconductor layer and the second semiconductor layer is closer to the second main surface than a part of a top surface of the second semiconductor layer is.

14. The photodetector according to claim 1 ,

wherein an impurity concentration of the first semiconductor layer is greater than an impurity concentration of the second semiconductor layer, in a region including an interface between the first semiconductor layer and the second semiconductor layer.

15. The photodetector according to claim 1 ,

wherein an impurity concentration of the second semiconductor layer is at least 10 16 cm −3 .

16. The photodetector according to claim 1 ,

wherein the first semiconductor layer includes a region where an impurity concentration increases with depth.

17. The photodetector according to claim 1 ,

wherein the first semiconductor layer includes a second conductivity layer that is in contact with the first main surface of the semiconductor substrate.

18. The photodetector according to claim 1 ,

wherein the first contact comprises a plurality of first contacts,

the isolation transistor comprises a plurality of isolation transistors each of which is connected to a corresponding one among the plurality of first contacts, and

the plurality of isolation transistors are disposed in a same circuit region.

19. The photodetector according to claim 18 ,

wherein at least two among the plurality of isolation transistors share the readout circuit.

20. The photodetector according to claim 18 ,

wherein at least two among the plurality of isolation transistors share a drain connected to the readout circuit.

21. The photodetector according to claim 1 ,

wherein the first semiconductor layer comprises N first semiconductor layers disposed in an N-polygon having an M-fold rotational symmetry to have the M-fold rotational symmetry, in plan view, where N is a positive integer not less than 3, and M is a positive integer not less than 2,

the circuit region is disposed in a rotational center of the N-polygon having the M-fold rotational symmetry, and

the isolation transistor comprises N isolation transistors disposed in the circuit region.

22. The photodetector according to claim 1 ,

wherein the readout circuit includes, in the circuit region:

a reset transistor that is connected to the drain of the isolation transistor and resets the first semiconductor layer via the isolation transistor;

a source follower transistor that reads an output signal from the isolation transistor; and

a selection transistor that is connected to the source follower transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2020
From: INOUE, AKITO; SUGIURA, YUKI; HIROSE, YUTAKA
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 054599/0083 →
Priority Claims (1)
JP 2018-067892 · Mar 30, 2018 · national
Continuity (2)
Continuation PCTJP2019013885 · Mar 28, 2019
Related Publication 20210028202A1 · Jan 28, 2021