IP Library Granted Patent US 11,894,436
Granted Patent B2
US 11,894,436 · App. 17/543,028 · Granted Feb 6, 2024

Gate-all-around monolithic stacked field effect transistors having multiple threshold voltages

Inventors: Julien Frougier (Albany, NY); Ruilong Xie (Niskayuna, NY); Nicolas Loubet (Guilderland, NY); Andrew M. Greene (Slingerlands, NY); Veeraraghavan S. Basker (Schenectady, NY); Balasubramanian S. Pranatharthiharan (Santa Clara, CA)
Assignee: International Business Machines Corporation
H01L29/42392H01L29/0673H01L29/66545H01L29/78696
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Quick Facts
Patent No.
US 11,894,436
App. No.
17/543,028
Granted
Feb 6, 2024
Kind
B2
Abstract

A CFET (complementary field effect transistor) structure including a substrate, a first CFET formed above the substrate, and a second CFET formed above the substrate. The first CFET includes a top FET and a bottom FET. The top FET and bottom FET of the first CFET include at least one nanosheet channel. A gate affiliated with the first CFET and the second CFET devices includes a continuous horizontal dielectric over the entire length of the gate. The top FET of each CFET has a first polarity. The bottom FET of each a CFET comprises a second polarity. The top FET of the first CFET includes a first work function metal, and the top FET of the second CFET includes a second work function metal.

Claims (38)

1. A CFET (complementary field effect transistor) structure comprising:

a substrate;

a first CFET formed above the substrate; and

a second CFET formed above the substrate;

wherein:

the first CFET comprises a top FET and a bottom FET, each of the top FET and bottom FET comprises at least one nanosheet channel, the top FET and bottom FET separated by a dielectric layer;

a gate affiliated with the first CFET and the second CFET devices comprising a continuous horizontal dielectric over the entire length of the gate;

the top FET of each stacked FET comprises a first polarity;

the bottom FET of each stacked FET comprises a second polarity;

the top FET of the first CFET comprises a first work function metal; and

the top FET of the second CFET comprises a second work function metal.

2. The CFET structure according to claim 1 , further comprising independent gate contacts for the top FET of the first CFET and the bottom FET of the first CFET.

3. The CFET structure according to claim 1 , further comprising a common gate contact for a top FET of a third CFET and a bottom FET of the third CFET.

4. The CFET structure according to claim 1 , further comprising a metal contact connecting the bottom FET of the first CFET and the bottom FET of the second CFET.

5. The CFET structure according to claim 1 , wherein the continuous horizontal dielectric comprises a composite dielectric.

6. The CFET structure according to claim 1 , further comprising a third work function metal of a bottom FET of a third CFET, the third work function metal in contact with a fourth work function metal of a top FET of the third CFET.

7. The CFET structure according to claim 1 , wherein the bottom FET of the first CFET comprises a third work function metal and the bottom FET of the second CFET comprises a fourth work function metal.

8. A CFET (complementary field effect transistor) structure comprising:

a substrate;

a first CFET formed above the substrate;

a second CFET formed above the substrate;

a third CFET formed above the substrate; and

a fourth CFET formed above the substrate;

wherein:

the first CFET comprises a top FET and a bottom FET, each of the top FET and bottom FET comprising at least one nanosheet channel;

a gate affiliated with the first CFET and the second CFET devices comprising a continuous horizontal dielectric over the entire length of the gate;

the top FET of each stacked FET comprises a first polarity;

the bottom FET of each stacked FET comprises a second polarity;

the top FET of the first CFET comprises a first work function metal;

the top FET of the second CFET comprises a second work function metal;

the top FET of the third CFET comprises a third work function metal; and

the top FET of the fourth CFET comprises a fourth work function metal.

9. The CFET structure according to claim 8 , further comprising independent gate contacts for the top FET of the first CFET and the bottom FET of the first CFET.

10. The CFET structure according to claim 8 , further comprising a common gate contact for the top FET of the first CFET and the bottom FET of the first CFET.

11. The CFET structure according to claim 8 , further comprising a metal contact connecting the bottom FET of the first CFET and the bottom FET of the second CFET.

12. The CFET structure according to claim 8 , wherein the continuous horizontal dielectric comprises a composite dielectric.

13. The CFET structure according to claim 8 , further comprising a fifth work function metal of the bottom FET of the third CFET, the third work function metal in contact with the third work function metal.

14. The CFET structure according to claim 8 , wherein the bottom FET of the first CFET comprises a sixth work function metal and the bottom FET of the second CFET comprises a seventh work function metal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2021
From: FROUGIER, JULIEN; XIE, RUILONG; LOUBET, NICOLAS; GREENE, ANDREW M.; BASKER, VEERARAGHAVAN S.; PRANATHARTHIHARAN, BALASUBRAMANIAN S.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 058309/0348 →
Continuity (1)
Related Publication 20230178620A1 · Jun 8, 2023
Cited By (2)
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