IP Library Granted Patent US 11,894,768
Granted Patent B2
US 11,894,768 · App. 17/996,409 · Granted Feb 6, 2024

DC/DC converter

Inventors: Kazutoshi Ono (Kanagawa, JP); Nobuhiko Shigyo (Kanagawa, JP); Hideo Maeda (Kanagawa, JP)
Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
H02M3/073G05F3/205H02M3/072
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Quick Facts
Patent No.
US 11,894,768
App. No.
17/996,409
Granted
Feb 6, 2024
Kind
B2
Abstract

When a bias voltage of a substrate is generated, an output voltage of a charge pump is controlled at an appropriate level, resultingly reducing a consumption current. The charge pump generates a predetermined output voltage from a predetermined DC power supply. A clock generator outputs a clock for operating the charge pump. A voltage monitoring unit monitors the output voltage of the charge pump and controls the clock output from the clock generator such that the output voltage is maintained within a predetermined range. A voltage regulator generates the bias voltage from the output voltage of the charge pump.

Claims (21)

1. A DC/DC converter, comprising:

a charge pump configured to generate a specific output voltage from a specific DC power supply;

a clock generator configured to output a clock for operating the charge pump;

a voltage monitoring unit configured to:

monitor the specific output voltage of the charge pump;

and

control the clock output from the clock generator such that the specific output voltage is maintained within a specific range;

compare the specific output voltage with one of a first potential or a second potential;

output a control signal that enables output of the clock when the specific output voltage goes beyond one of the first potential or the second potential:

compare the specific output voltage with the first potential when the control signal indicates invalidity of the clock;

compare the specific output voltage with the second potential when the control signal indicates validity of the clock; and

compare the specific output voltage with the second potential when a specific forced signal is input even in a case where the control signal indicates invalidity of the clock; and

a voltage regulator configured to generate a bias voltage from the specific output voltage of the charge pump.

2. The DC/DC converter according to claim 1 , wherein

the charge pump is further configured to generate the specific output voltage having a specific negative potential from the specific DC power supply having a specific positive potential, and

the voltage regulator is further configured to generate the bias voltage of a specific negative potential from the specific output voltage.

3. The DC/DC converter according to claim 2 , wherein the bias voltage is a body bias voltage of a circuit that is a CMOS of a fully-depleted silicon on insulator (SOI) process.

4. The DC/DC converter according to claim 1 , wherein

an output of the charge pump is connected to a capacitor, and

charges are charged and discharged in the capacitor in response to an operation of the charge pump.

5. The DC/DC converter according to claim 1 , wherein the first potential is −1.4 V and the second potential is −1.5 V.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2022
From: ONO, KAZUTOSHI; SHIGYO, NOBUHIKO; MAEDA, HIDEO
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 061444/0580 →
Priority Claims (1)
JP 2020-077926 · Apr 27, 2020 · national
Continuity (1)
Related Publication 20230216400A1 · Jul 6, 2023