IP Library › Granted Patent US 11,894,816
Granted Patent B2
US 11,894,816 · App. 17/215,208 · Granted Feb 6, 2024

Power amplifier circuit

Inventors: Takayuki Tsutsui (Kyoto, JP); Satoshi Tanaka (Kyoto, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H03F3/245H03F1/52H03F2200/222H03F2200/387H03F2200/451
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Quick Facts
Patent No.
US 11,894,816
App. No.
17/215,208
Granted
Feb 6, 2024
Kind
B2
Abstract

A power amplifier circuit includes a first amplifier that amplifies a first RF signal and outputs a second RF signal, a second amplifier that amplifies the second RF signal and outputs a third RF signal, a bias circuit that supplies a bias current or voltage to the first or second amplifier, and a bias adjustment circuit that adjusts the bias current or voltage on the basis of the first RF signal, the second RF signal, or the third RF signal. The bias adjustment circuit includes a first diode having an anode to which a control signal indicating a signal based on the first, second, or third RF signal is inputted, and a cathode connected to a ground. The bias circuit includes a bias transistor that outputs the bias current or voltage on the basis of a voltage at the anode of the first diode.

Claims (50)

1. A power amplifier circuit comprising:

a first amplifier configured to amplify a first radio frequency (RF) signal supplied to the first amplifier, and to output a second RF signal;

a second amplifier configured to amplify the second RF signal supplied to the second amplifier, and to output a third RF signal;

a bias circuit configured to supply a bias current or a bias voltage to the first amplifier or to the second amplifier; and

a bias adjustment circuit configured to adjust the bias current or the bias voltage based on the first RF signal, the second RF signal, or the third RF signal,

wherein the bias adjustment circuit comprises a first diode having an anode to which a control signal is input, and a cathode connected to ground, the control signal being indicative of the first RF signal, the second RF signal, or the third RF signal,

wherein the bias circuit comprises a bias transistor configured to output the bias current or the bias voltage based on a voltage at the anode of the first diode,

wherein the first amplifier has a first supply terminal to which the first RF signal is supplied, and a first output terminal from which the second RF signal is output,

wherein the second amplifier has a second supply terminal connected to the first output terminal of the first amplifier and to which the second RF signal is supplied, and a second output terminal from which the third RF signal is output,

wherein the bias transistor has an emitter connected to the first supply terminal or to the second supply terminal,

wherein the anode of the first diode is connected to the first supply terminal, the first output terminal, or the second output terminal, and

wherein the bias transistor further has a base connected to the anode of the first diode.

2. The power amplifier circuit according to claim 1 ,

wherein the bias adjustment circuit further comprises a first resistor, and

wherein the control signal is input to the anode of the first diode through the first resistor.

3. The power amplifier circuit according to claim 2 , wherein the anode of the first diode is connected to the first resistor.

4. The power amplifier circuit according to claim 1 ,

wherein the bias adjustment circuit further comprises a second resistor, and

wherein the voltage at the anode of the first diode is supplied to the bias circuit through the second resistor.

5. The power amplifier circuit according to claim 4 , wherein the anode of the first diode is connected to the second resistor.

6. The power amplifier circuit according to claim 1 ,

wherein the bias circuit further comprises:

a second diode having an anode to which the voltage at the anode of the first diode is supplied, and a grounded cathode, and

a third diode having a cathode connected to the anode of the second diode, and an anode to which a bias control voltage or a bias control current is supplied, and

wherein a base of the bias transistor is connected to the anode of the third diode.

7. The power amplifier circuit according to claim 6 ,

wherein the anode of the second diode is connected to the anode of the first diode, and

the anode of the third diode is connected to a power supply terminal from which the bias control voltage or the bias control current is supplied.

8. The power amplifier circuit according to claim 1 , wherein the bias adjustment circuit further comprises a capacitor configured to receive the first RF signal, the second RF signal, or the third RF signal at a first terminal, and to output the control signal from a second terminal.

9. The power amplifier circuit according to claim 8 ,

wherein the first terminal of the capacitor is connected to the first supply terminal, the first output terminal, or the second output terminal, and

wherein the second terminal of the capacitor is directly connected to the anode of the first diode, or is connected to the anode of the first diode with the first resistor connected to the anode of the first diode and disposed between the first diode and the second terminal of the capacitor.

10. The power amplifier circuit according to claim 1 , wherein the bias adjustment circuit further comprises a coupler coupled to an output path of the second amplifier, and configured to output the control signal based on the third RF signal.

11. The power amplifier circuit according to claim 1 ,

wherein the bias adjustment circuit further comprises a plurality of diodes connected in series,

wherein the second RF signal is input to the plurality of diodes, and

wherein the control signal is based on the second RF signal, and is output from an anode of a first one of the plurality of diodes.

12. The power amplifier circuit according to claim 11 ,

wherein an anode of a second one of the plurality of diodes is connected to the first output terminal, and

wherein the anode of the first one of the plurality of diodes is connected to the anode of the first diode.

13. A power amplifier circuit comprising:

an amplifier configured to amplify a first radio frequency (RF) signal supplied to the amplifier, and to output a second RF signal;

a bias circuit configured to supply a bias current or a bias voltage to the amplifier; and

a bias adjustment circuit configured to adjust the bias current or the bias voltage based on the first RF signal or the second RF signal,

wherein the bias adjustment circuit comprises a first diode having an anode to which a signal based on the first RF signal or the second RF signal is input, and a cathode connected to a ground,

the bias circuit comprises a bias transistor configured to output the bias current or the bias voltage based on a voltage at the anode of the first diode,

wherein the amplifier has a supply terminal to which the first RF signal is supplied, and an output terminal from which the second RF signal is output,

wherein the bias transistor has an emitter connected to the supply terminal,

wherein the anode of the first diode is connected to the output terminal, and

wherein the bias transistor has a base connected to the anode of the first diode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2021
From: TSUTSUI, TAKAYUKI; TANAKA, SATOSHI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 055751/0551 →
Priority Claims (1)
JP 2020-059767 · Mar 30, 2020 · national
Continuity (1)
Related Publication 20210305951A1 · Sep 30, 2021