Methods and apparatus for predicting instructions for execution

1. An apparatus comprising:

prediction circuitry to predict instructions for execution, wherein said prediction circuitry comprises:

a plurality of hierarchical prediction units, comprising a lowest level prediction unit and one or more higher level prediction units to:

perform respective hierarchical predictions of each of the instructions for execution, wherein predictions higher in the hierarchy have a higher expected accuracy than predictions lower in the hierarchy; and

responsive to a given prediction higher in the hierarchy being different from a corresponding prediction lower in the hierarchy, correct the corresponding prediction lower in the hierarchy, and

a prediction correction metric determination unit to determine a prediction correction metric indicative of an incidence of uncorrected predictions performed by the prediction circuitry, the uncorrected predictions being predictions matching predictions of the one or more higher level prediction units, and

fetch circuitry to fetch instructions for execution, the fetch circuitry being configured to:

fetch instructions predicted by at least one of said plurality of hierarchical predictions; and

in response to the prediction correction metric indicating an incidence of said uncorrected predictions being below a threshold, applying a delay before said fetching.

2. An apparatus according to claim 1 , wherein the prediction correction metric determination unit is configured to determine the prediction correction metric based on a number, within a time window, of said corrections, by said one or more higher level prediction units, of predictions lower in the hierarchy.

3. An apparatus according to claim 2 , wherein the prediction correction metric determination unit is configured to determine the prediction correction metric such that a higher number of said corrections corresponds to a lower prediction correction metric.

4. An apparatus according to claim 2 , wherein:

the prediction correction metric determination unit is configured to, in the calculation of the number of said corrections, apply a weighting to said corrections; and

the weighting applied to a given correction is based on the level of the corresponding higher level prediction unit, such that a higher level prediction unit has a higher weight.

5. An apparatus according to claim 2 , wherein:

the prediction correction metric determination unit is configured to determine said prediction correction metric at the expiry of each of a plurality of prediction windows; and

the fetch circuitry is configured to apply said delay based on the determined incidence of uncorrected predictions of a previous one of said plurality of windows.

6. An apparatus according to claim 5 , wherein said previous one is a most recently expired window.

7. An apparatus according to claim 1 , wherein each of the one or more higher level prediction units is responsive to a given prediction matching a corresponding prediction lower in the hierarchy to confirm said corresponding prediction lower in the hierarchy.

8. An apparatus according to claim 1 , wherein:

the prediction circuitry and fetch circuitry are configured to operate based on processing cycles; and

the fetch circuitry is configured to set the delay to an integer number of processing cycles.

9. An apparatus according to claim 1 , wherein the fetch circuitry is configured to:

set the delay to a first amount based on the prediction correction metric indicating an incidence of uncorrected predictions below a first threshold; and

set the delay to a second amount based on the prediction correction metric indicating an incidence of uncorrected predictions below a second threshold.

10. An apparatus according to claim 9 , wherein:

the second threshold indicates a lower incidence of uncorrected predictions than the first threshold; and

the second amount is larger than the first amount.

11. An apparatus according to claim 10 , wherein:

the first amount is a single processing cycle; and

the second amount is two processing cycles.

12. An apparatus according to claim 1 , wherein each higher level prediction unit is configured to perform said correcting in respect of predictions specifically one level lower in the hierarchy.

13. An apparatus according to claim 1 , wherein the fetch circuitry is responsive to a given correction, performed by a higher level prediction unit having a hierarchy level equal to or greater than a level threshold, to bypass applying said delay when fetching an associated instruction.

14. An apparatus according to claim 13 , wherein the level threshold is the highest hierarchy level.

15. An apparatus according to claim 1 , wherein:

the lowest level prediction unit is configured to output a given lowest level prediction in a first processing cycle; and

each of the one or more higher level prediction units is configured to output respective predictions, corresponding to the given lowest level prediction, in respective processing cycles immediately subsequent to said first processing cycle corresponding to their respective hierarchy levels.

16. An apparatus according to claim 15 , wherein the fetch circuitry is configured to, by default, begin fetching a given instruction, corresponding to said first prediction, in said first processing cycle.

17. An apparatus according to claim 1 , wherein, responsive to a given higher level prediction being different from a corresponding lower level prediction:

the prediction circuitry is configured to flush one or more predictions subsequent to the corresponding first prediction;

the fetch circuitry is configured to flush any fetched instructions corresponding to flushed predictions.

18. An apparatus according to claim 1 , wherein the fetch circuitry is responsive to receiving a flush command to:

flush pending predictions and/or pending instructions; and

bypass applying said delay until a post-flush time window has elapsed.

19. A method comprising:

predicting instructions for execution using prediction circuitry comprising a plurality of hierarchical prediction units, comprising a lowest level prediction unit and one or more higher level prediction units to, wherein said predicting comprises:

performing respective hierarchical predictions of each of the instructions for execution, wherein predictions higher in the hierarchy have a higher expected accuracy than predictions lower in the hierarchy; and

responsive to a given prediction higher in the hierarchy being different from a corresponding prediction lower in the hierarchy, correcting the corresponding prediction lower in the hierarchy,

determining a prediction correction metric indicative of an incidence of uncorrected predictions performed by the prediction circuitry, the uncorrected predictions being predictions matching predictions of the one or more higher level prediction units; and

fetching instructions for execution, the fetching comprising:

fetching instructions predicted by at least one of said plurality of hierarchical predictions; and

in response to the prediction correction metric indicating an incidence of uncorrected predictions being below a threshold, applying a delay before said fetching.