IP Library › Granted Patent US 11,901,288
Granted Patent B2
US 11,901,288 · App. 16/924,968 · Granted Feb 13, 2024

Semiconductor device and method of manufacturing the same

Inventors: Tetsuya Iida (Tokyo, JP); Yasutaka Nakashiba (Tokyo, JP); Shinichi Uchida (Tokyo, JP)
Assignee: RENESAS ELECTRONICS CORPORATION
H01L23/5227H01L23/5226H01L28/10H03F3/04H03M1/12
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Quick Facts
Patent No.
US 11,901,288
App. No.
16/924,968
Granted
Feb 13, 2024
Kind
B2
Abstract

A semiconductor device includes a semiconductor substrate, a semiconductor element, and a multilayer wiring. The semiconductor element is formed on the semiconductor substrate. The multilayer wiring includes a wiring electrically connected with the semiconductor element, and a first inductor. The multilayer wiring is formed on the semiconductor substrate such that the multilayer wiring covers the semiconductor element. The first inductor is formed such that the first inductor electrically isolated from the wiring and is magnetically connected with the wiring.

Claims (71)

1. A semiconductor device comprising:

a semiconductor substrate;

a semiconductor element formed on the semiconductor substrate; and

a multilayer wiring formed on the semiconductor substrate such that the multilayer wiring covers the semiconductor element, the multilayer wiring comprising:

a wiring electrically connected with the semiconductor element; and

a first inductor,

wherein the first inductor is configured to be electrically isolated from the wiring and be magnetically connected with the wiring,

wherein the first inductor comprises:

a plurality of extending portions extending along a first direction which is an extending direction of the wiring; and

a plurality of connecting portions respectively connecting two adjacent extending portions with each other.

2. The semiconductor device according to claim 1 ,

wherein a first central axis of the first inductor is along a normal line to a main surface of the semiconductor substrate.

3. The semiconductor device according to claim 2 ,

wherein the first inductor, in plan view, is adjacent to the wiring in a width direction of the wiring.

4. The semiconductor device according to claim 3 ,

wherein a shape of a region surrounded by a peripheral portion of the first inductor is substantially rectangular shape or substantially oval shape when the first inductor is viewed from the first central axis.

5. The semiconductor device according to claim 1 ,

wherein a first central axis of the first inductor is along a main surface of the semiconductor substrate.

6. The semiconductor device according to claim 5 ,

wherein at least a portion of the first inductor overlaps with the wiring in a plan view.

7. The semiconductor device according to claim 6 ,

wherein a shape of a region surrounded by a peripheral portion of the first inductor is substantially rectangular shape or substantially oval shape when the first inductor is viewed from the first central axis.

8. The semiconductor device according to claim 1 ,

wherein the multilayer wiring comprises a second inductor configured to be electrically isolated from the wiring and be magnetically connected with the wiring,

wherein the second inductor is electrically connected with the first inductor, and

wherein a first central axis of the first inductor and a second central axis of the second inductor are along a main surface of the semiconductor substrate.

9. The semiconductor device according to claim 1 ,

wherein the multilayer wiring comprises a second inductor configured to be electrically isolated from the wiring and be magnetically connected with the wiring,

wherein the second inductor is electrically connected with the first inductor, and

wherein a first central axis of the first inductor and a second central axis of the second inductor are along a normal line to a main surface of the semiconductor substrate.

10. The semiconductor device according to claim 9 ,

wherein the multilayer wiring comprises a third inductor configured to be electrically isolated from the wiring and be magnetically connected with the wiring,

wherein the third inductor is electrically connected with the first inductor and the second inductor, and

wherein a third central axes of the third inductor is along the main surface of the semiconductor substrate.

11. The semiconductor device according to claim 8 ,

wherein the first inductor and the second inductor are configured to operate differentially.

12. The semiconductor device according to claim 9 ,

wherein the first inductor and the second inductor are configured to operate differentially.

13. The semiconductor device according to claim 8 , comprising:

an amplifier circuit electrically connected with the first inductor; and

an analog-digital (AD) conversion circuit electrically connected with the amplifier circuit.

14. The semiconductor device according to claim 9 , comprising:

an amplifier circuit electrically connected with the first inductor; and

an analog-digital (AD) conversion circuit electrically connected with the amplifier circuit.

15. The semiconductor device according to claim 13 ,

wherein the first inductor is configured to magnetically connected with the wiring when a current having a current density of 1×10 5 A/μm 2 or more flows in the wiring.

16. The semiconductor device according to claim 14 ,

wherein the first inductor is configured to magnetically connected with the wiring when a current having a current density of 1×10 5 A/μm 2 or more flows in the wiring.

17. A method comprising:

(a) providing a semiconductor device comprising a multilayer wiring in which a wiring and an inductor are formed;

(b) supplying a current into the wiring; and

(c) detecting an electromotive voltage generated in the inductor when the current is supplied into the wiring,

wherein the inductor is configured to be electrically isolated from the wiring and be magnetically connected with the wiring, and

wherein the inductor comprises:

a plurality of extending portions extending along a first direction which is an extending direction of the wiring; and

a plurality of connecting portions respectively connecting two adjacent extending portions with each other.

18. The method according to claim 17 ,

wherein, in the (c), the electromotive voltage generated in the inductor is amplified.

19. The method according to claim 18 ,

Wherein, in the (b), the current is supplied so that a current density in the wiring is 1×10 5 A/μm 2 or more.

20. A semiconductor device comprising:

a semiconductor substrate;

a semiconductor element formed on the semiconductor substrate; and

a multilayer wiring formed on the semiconductor substrate such that the multilayer wiring covers the semiconductor element, the multilayer wiring comprising:

a wiring electrically connected with the semiconductor element;

a first inductor; and

a second inductor,

wherein the first inductor is configured to be electrically isolated from the wiring and be magnetically connected with the wiring,

wherein the second inductor is configured to be electrically isolated from the wiring and be magnetically connected with the wiring,

wherein the second inductor is electrically connected with the first inductor, and

wherein a first central axis of the first inductor and a second central axis of the second inductor are along a main surface of the semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 13, 2020
From: IIDA, TETSUYA; NAKASHIBA, YASUTAKA; UCHIDA, SHINICHI
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 053186/0350 →
Continuity (1)
Related Publication 20220013457A1 · Jan 13, 2022