On chip test architecture for continuous time delta sigma analog-to-digital converter

1. An integrated circuit, comprising:

a test circuit including:

a first memory configured to store digital reference data representing an analog reference signal;

a modulator configured to receive the digital reference data and to convert the digital reference data to single-bit data stream;

a second memory configured to receive the single-bit data stream from the modulator and to store the single-bit data stream; and

a finite-impulse response filter configured to receive the single-bit data stream from the second memory and to convert the single-bit data stream to an analog test signal; and

a continuous time delta sigma analog-to-digital converter coupled to the test circuit and including:

an input configured to receive the analog test signal from the test circuit;

conversion circuit configured to convert the analog test signal to digital test data; and

an output configured to output the digital test data, wherein the test circuit is configured to receive the digital test data from the continuous time delta sigma analog-to-digital converter and to assess a performance of the continuous time delta sigma analog-to-digital converter based on the digital test data.

2. The integrated circuit of claim 1 , wherein the test circuit includes a digital signal processor configured to receive the digital test data and to determine an accuracy of the continuous time delta sigma analog-to-digital converter based on the digital test data.

3. The integrated circuit of claim 2 , wherein the digital signal processor is configured to compare the digital test data to the digital reference data to determine the accuracy of the continuous time delta sigma analog-to-digital converter.

4. The integrated circuit of claim 1 , wherein the digital reference signal represents a digitized version of the analog reference signal sampled at a frequency at least double a Nyquist frequency associated with the analog reference signal.

5. The integrated circuit of claim 4 , wherein the analog test signal corresponds to a recreation of the analog reference signal.

6. The integrated circuit of claim 4 , wherein the analog reference signal is a sine wave.

7. The integrated circuit of claim 4 , wherein each sample of the digital reference signal is a multibit data value, wherein a bit rate of the single bit data stream is at least 10 times greater than a frequency of the analog reference signal.

8. The integrated circuit of claim 7 , wherein the frequency of the analog reference signal is less than 100 MHz and the bit rate is greater than 1 Gb/s.

9. The integrated circuit of claim 1 , wherein the finite impulse response filter includes a plurality of single bit digital-to-analog converters.

10. The integrated circuit of claim 9 , wherein the finite impulse response filter includes a plurality of flip flops connected in series, wherein each single-bit digital-to-analog converter has an input coupled to a data output of a respective flip-flop.

11. The integrated circuit of claim 10 , wherein the single-bit data stream is passed to the flip flops.

12. The integrated circuit of claim 11 , wherein the finite impulse response digital-to-analog converter includes a plurality of summers that collectively sum analog output values of the single-bit digital-to-analog converters to generate the analog test signal.

13. A method, comprising:

storing, in an integrated circuit, digital reference data corresponding to a digital representation of an analog reference signal;

converting the digital reference data to a single-bit data stream;

converting, with a finite impulse response digital-to-analog converter of the integrated circuit, the single-bit data stream to an analog test signal; and

converting, with a continuous time delta sigma analog-to-digital converter of the integrated circuit, the analog test signal to digital test data; and

determining an accuracy of the digital test data with a test circuit of the integrated circuit, wherein determining the accuracy includes processing the digital test data with a digital signal processor of the test circuit.

14. The method of claim 13 , wherein determining the accuracy includes comparing the digital test data to the digital reference data.

15. The method of claim 14 , wherein comparing the digital test data to the digital reference data includes:

digitally filtering the digital test data;

performing gain and offset normalization of the digital test data;

aligning a phase of the digital test data with a phase of the digital reference data; and

cross-correlating the digital test data with the digital reference data.

16. The method of claim 13 , wherein converting the single-bit data stream to the analog test signal includes:

passing the single-bit data stream through a plurality of flip-flops connected in series;

converting an output of each flip flop to an analog value with a respective single-bit digital-to-analog converter; and

generating the analog test signal by summing the analog values output by each single-bit digital-to-analog converter.

17. A method, comprising:

storing digital reference data in an integrated circuit, the digital reference data corresponding to an over-sampled X-bit representation of an analog reference signal;

generating, from the digital reference data, a single-bit data stream;

storing the single-bit data stream in a memory;

passing the single-bit data stream from the memory to a finite-impulse response digital-to-analog converter including a plurality of flip-flops coupled in series, a plurality of single-bit digital-to-analog converters each coupled to an output of a respective flip-flop, and a plurality of summers;

generating an analog test signal with the finite-impulse response digital-to-analog converter by summing outputs of the single-bit digital-to-analog converters with the summers;

converting the analog test signal to digital test data with a Y-bit continuous time delta-sigma analog-to-digital converter of the integrated circuit, wherein Y is an integer less than or equal to X; and

determining an accuracy of the continuous time delta-sigma analog-to-digital converter by comparing the digital test data to the digital reference data.

18. The method of claim 17 , further comprising determining the accuracy with a digital signal processor of a test circuit.

19. The method of claim 17 , further comprising generating the digital reference data by sampling the analog reference signal with a frequency at least double a Nyquist frequency associated with the analog reference signal.

20. The method of claim 13 , further comprising generating the digital reference data by sampling the analog reference signal with a frequency at least double a Nyquist frequency associated with the analog reference signal.

21. The method of claim 17 , wherein the analog test signal corresponds to a recreation of the analog reference signal.

22. The method of claim 17 , wherein the analog reference signal is a sine wave.