IP Library Granted Patent US 11,908,531
Granted Patent B2
US 11,908,531 · App. 17/495,574 · Granted Feb 20, 2024

Detecting and managing under-program failures in non-volatile memory

Inventors: Nikolaos Papandreou (Thalwil, CH); Roman Alexander Pletka (Uster, CH); Radu Ioan Stoica (Zurich, CH); Nikolas Ioannou (Zurich, CH); Charalampos Pozidis (Thalwil, CH); Timothy J. Fisher (Cypress, TX); Aaron Daniel Fry (Richmond, TX)
Assignee: International Business Machines Corporation
G11C16/3459G11C16/102G11C16/26G11C16/32G11C16/3404G11C16/3495
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Quick Facts
Patent No.
US 11,908,531
App. No.
17/495,574
Granted
Feb 20, 2024
Kind
B2
Abstract

A non-volatile memory includes a plurality of cells each individually capable of storing multiple bits of data including bits of multiple physical pages. A controller of the non-volatile memory issues a command to perform a programming pass for a physical page among the multiple physical pages. The controller determines whether or not the programming pass took less than a minimum threshold time and no program fail status indication was received. Based on determining the programming pass took less than a minimum threshold time and no program fail status indication was received, the controller detects an under-programming error and performs mitigation for the detected under-programming error.

Claims (36)

1. A method of controlling a non-volatile memory including a plurality of cells each individually capable of storing multiple bits of data including bits of multiple physical pages, the method comprising:

a controller of the non-volatile memory issuing a command to perform a programming pass for a physical page among the multiple physical pages;

the controller determining whether or not the programming pass took less than a minimum threshold time and no program fail status indication was received; and

based on determining the programming pass took less than a minimum threshold time and no program fail status indication was received, the controller detecting an under-programming error and performing mitigation for the detected under-programming error.

2. The method of claim 1 , wherein:

the non-volatile memory includes an integrated circuit including a plurality of physical layers;

the method further comprises the controller determining the minimum threshold time based on which of the plurality of physical layers includes the physical page.

3. The method of claim 1 , wherein:

the controller programs the physical pages in a plurality of programming passes including the programming pass; and

the method further comprises the controller determining the minimum threshold time based on which of the plurality of programming passes the programming pass is.

4. The method of claim 1 , wherein:

the multiple physical pages are of a plurality of different page types;

the method further comprises the controller determining the minimum threshold time based on a page type of the physical page.

5. The method of claim 1 , wherein the method further comprises:

the controller determining the minimum threshold time based on a program/erase (P/E) cycle count of a block containing the physical page.

6. The method of claim 1 , wherein:

the non-volatile memory includes an integrated circuit including a plurality of physical layers;

performing mitigation includes the controller programming data intended for the physical page into a different one of the plurality of physical layers.

7. The method of claim 6 , wherein:

the plurality of physical layers includes a particular layer; and

performing mitigation further includes relocating valid data from the particular layer, writing dummy data to non-programmed physical pages in the particular layer, and invalidating valid physical pages in the particular layer.

8. A computer program product, the computer program product comprising a computer readable storage device having program instructions embodied therewith, the program instructions being executable by a controller of a non-volatile memory including a plurality of cells each individually capable of storing multiple bits of data including bits of multiple physical pages including at least a first page and a second page, wherein, when executed, the program instructions cause the controller to perform:

issuing a command to perform a programming pass for a physical page among the multiple physical pages;

determining whether or not the programming pass took less than a minimum threshold time and no program fail status indication was received; and

based on determining the programming pass took less than a minimum threshold time and no program fail status indication was received, detecting an under-programming error and performing mitigation for the detected under-programming error.

9. The computer program product of claim 8 , wherein:

the non-volatile memory includes an integrated circuit including a plurality of physical layers;

the program instructions cause the controller to perform determining the minimum threshold time based on which of the plurality of physical layers includes the physical page.

10. The computer program product of claim 8 , wherein:

the controller programs the physical pages in a plurality of programming passes including the programming pass; and

the program instructions cause the controller to perform determining the minimum threshold time based on which of the plurality of programming passes the programming pass is.

11. The computer program product of claim 8 , wherein:

the multiple physical pages are of a plurality of different page types;

the program instructions cause the controller to perform determining the minimum threshold time based on a page type of the physical page.

12. The computer program product of claim 8 , wherein the controller is further configured to perform:

determining the minimum threshold time based on a program/erase (P/E) cycle count of a block containing the physical page.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2021
From: PAPANDREOU, NIKOLAOS; ALEXANDER, ROMAN ALEXANDER; STOICA, RADU IOAN; IOANNOU, NIKOLAS; POZIDIS, CHARALAMPOS; FISHER, TIMOTHY J.; FRY, AARON DANIEL
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 057720/0653 →
Continuity (1)
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