Fluorine incorporation method for nanosheet
A method includes forming a plurality of nanostructures over a substrate; etching the plurality of nanostructures to form recesses; forming source/drain regions in the recesses; removing first nanostructures of the plurality of nanostructures leaving second nanostructures of the plurality of nanostructures; depositing a gate dielectric over and around the second nanostructures; depositing a protective material over the gate dielectric; performing a fluorine treatment on the protective material; removing the protective material; depositing a first conductive material over the gate dielectric; and depositing a second conductive material over the first conductive material.
1. A method comprising:
forming a plurality of nanostructures over a substrate;
etching the plurality of nanostructures to form recesses;
forming source/drain regions in the recesses;
removing first nanostructures of the plurality of nanostructures leaving second nanostructures of the plurality of nanostructures;
depositing a gate dielectric over and around the second nanostructures;
depositing a protective material over the gate dielectric, the protective material comprising a metal;
performing a fluorine treatment on the protective material;
removing the protective material;
depositing a first conductive material over the gate dielectric; and
depositing a second conductive material over the first conductive material.
2. The method of claim 1 , wherein performing the fluorine treatment comprises forming a fluorine-containing layer over the protective material.
3. The method of claim 2 , wherein forming the fluorine-containing layer over the protective material comprises converting an upper portion of the protective material to the fluorine-containing layer.
4. The method of claim 2 , wherein performing the fluorine treatment further comprises performing an anneal process on the fluorine-containing layer.
5. The method of claim 4 , wherein performing the anneal process comprises diffusing fluorine from the fluorine-containing layer into the gate dielectric.
6. The method of claim 2 further comprising removing the fluorine-containing layer.
7. The method of claim 2 , wherein the fluorine-containing layer further comprises tungsten.
8. The method of claim 1 , wherein performing the fluorine treatment comprises filling vacancies in the gate dielectric with fluorine.
9. A method comprising:
forming nanostructures over a substrate;
forming a first dielectric layer over the substrate and around the nanostructures;
forming a second dielectric layer over the first dielectric layer;
depositing a first conductive material over the second dielectric layer;
forming a fluorine-containing layer over the first conductive material;
diffusing fluorine from the fluorine-containing layer into the second dielectric layer, wherein diffusing fluorine changes a breakdown voltage of the first dielectric layer and the second dielectric layer;
removing the fluorine-containing layer, wherein removing the fluorine-containing layer comprises removing a portion of the first conductive material; and
forming a second conductive material over the second dielectric layer.
10. The method of claim 9 , wherein before forming the second conductive material, the first conductive material is removed.
11. The method of claim 9 , wherein the second conductive material is further formed over the first conductive material.
12. The method of claim 9 , wherein the first conductive material comprises at least one of titanium nitride, tantalum nitride, and titanium silicon nitride.
13. The method of claim 9 , wherein diffusing fluorine comprises performing an anneal process, and wherein after diffusing fluorine the second dielectric layer comprises a fluorine-to-metal atomic ratio of between about 0.005 and about 0.05.
14. The method of claim 9 , wherein diffusing fluorine further comprises diffusing fluorine into the first dielectric layer, and wherein a first portion of fluorine fills vacancies in the second dielectric layer, and wherein a second portion of fluorine attaches to dangling silicon bonds at an interface between the substrate and the first dielectric layer.
15. A method comprising:
forming first nanostructures and second nanostructures over a substrate;
removing the first nanostructures;
forming a first gate dielectric around the second nanostructures;
tuning a breakdown voltage of the first gate dielectric, the tuning the breakdown voltage comprising:
forming a protective material over the first gate dielectric, the protective material comprising a metal nitride;
forming a fluorine-containing layer over the protective material;
diffusing fluorine from the fluorine-containing layer through the protective material and into the first gate dielectric; and
removing the protective material; and
forming a first conductive material over the first gate dielectric.
16. The method of claim 15 , wherein forming the fluorine-containing layer comprises converting an upper portion of the protective material to the fluorine-containing layer.
17. The method of claim 15 , wherein the fluorine-containing layer further comprises tungsten.
18. The method of claim 15 , wherein diffusing fluorine from the fluorine-containing layer through the protective material comprises performing an anneal process, and wherein the first gate dielectric comprises a fluorine-to-metal ratio of between about 0.05 and about 0.005.
19. The method of claim 18 further comprising:
before forming the first gate dielectric, forming a second gate dielectric around the second nanostructures; and
diffusing fluorine from the fluorine-containing layer through the protective material, through the first gate dielectric, and into the second gate dielectric.
20. The method of claim 15 , wherein the protective material comprises titanium nitride, tantalum nitride, or titanium silicon nitride.