IP Library › Granted Patent US 11,917,734
Granted Patent B2
US 11,917,734 · App. 18/125,931 · Granted Feb 27, 2024

Driver device layouts

Inventors: Shang Ding (Shanghai, CN); Huibo Zhong (Shanghai, CN); Bin Hu (Shanghai, CN)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H05B45/30H05B45/40
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Quick Facts
Patent No.
US 11,917,734
App. No.
18/125,931
Granted
Feb 27, 2024
Kind
B2
Abstract

An example circuit includes a substrate having a plurality of scan lines substantially orthogonal to a virtual centerline of the substrate. The circuit also includes a first driver integrated circuit (IC) on the substrate, the first driver IC including: a set of line switches coupled to a first set of the plurality of scan lines along a side of the first driver IC nearest the virtual centerline; a data output and a register. The circuit also includes a second driver IC on the substrate, the second driver IC including: a set of line switches coupled to a second set of the plurality of scan lines along a side of the second IC nearest the virtual centerline; and a data input coupled to the data output of the first driver IC.

Claims (68)

1. An electrical circuit for driving light emitting diodes (LEDs) comprising:

a substrate including a plurality of scan lines substantially orthogonal to a virtual centerline of the substrate;

a first driver integrated circuit (IC) on the substrate, the first driver IC including:

a set of line switches coupled to a first set of the plurality of scan lines along a side of the first driver IC nearest the virtual centerline;

a data output; and

a register, via a digital core, configured to store scanning data to control activation of a sequence of the set of line switches, wherein the scanning data is configured to be programmed through a communications interface responsive to signals provided at a data input and a clock input; and

a second driver IC on the substrate, the second driver IC including:

a set of line switches coupled to a second set of the plurality of scan lines along a side of the second IC nearest the virtual centerline; and

a data input coupled to the data output of the first driver IC,

wherein the first driver IC is configured to control the set of line switches of the second driver IC based on a scanning sequence of the plurality of scan line switches.

2. The electrical circuit of claim 1 , wherein:

the first set of the plurality of scan lines are interlaced with the second set of the plurality of scan lines.

3. The electrical circuit of claim 1 , wherein:

the first driver IC and the second driver IC are each respective light emitting diode (LED) driver IC devices;

a first surface of the substrate includes the first driver IC and the second driver IC; and

a second surface of the substrate includes an array of LEDs arranged in a matrix of rows and columns of LEDs.

4. The electrical circuit of claim 3 , wherein:

each of the rows of LEDs in the array of LEDs is coupled to a respective one of the plurality of scan lines.

5. The electrical circuit of claim 3 , wherein:

the first driver IC is configured to drive a first set of the columns of LEDs in the array of LEDs; and

the second driver IC is configured to drive a second set of the columns of LEDs in the array of LEDs.

6. The electrical circuit of claim 5 , wherein:

the register is configured to define a scanning sequence of the plurality of scan lines.

7. The electrical circuit of claim 6 , wherein:

in response to the scanning sequence, the first driver IC is configured to control one or more of the set of line switches of the second driver IC to drive one or more LEDs in the first set of columns of LEDs.

8. A system for driving light emitting diodes (LEDs) comprising:

a substrate including a plurality of scan lines substantially orthogonal to a virtual centerline of the substrate;

a first driver integrated circuit (IC) on a first side of the substrate, the first driver IC including:

a set of line switches coupled to a first set of the plurality of scan lines along a side of the first driver IC nearest the virtual centerline;

a data output; and

a register, via a digital core, configured to store scanning data to control activation of a sequence of the set of line switches, wherein the scanning data is configured to be programmed through a communications interface responsive to signals provided at a data input and a clock input;

a second driver IC on the first side of the substrate, the second driver IC including:

a set of line switches coupled to a second set of the plurality of scan lines along a side of the second IC nearest the virtual centerline; and

a data input coupled to the data output of the first driver IC; and

a matrix of light emitting diodes (LEDs) on the second side of the substrate, the matrix including rows and columns of LEDs, wherein each of the rows of LEDs of the matrix is coupled to a respective one of the plurality of scan lines,

wherein the first driver IC is configured to control the set of line switches of the second driver IC based on a scanning sequence of the plurality of scan line switches.

9. The system of claim 8 , wherein:

the first set of the plurality of scan lines are interlaced with the second set of the plurality of scan lines.

10. The system of claim 8 , wherein:

the first driver IC and the second driver IC are each respective LED driver IC devices.

11. The system of claim 8 , wherein:

the first driver IC is configured to drive a first set of the columns of LEDs in the matrix of LEDs; and

the second driver IC is configured to drive a second set of the columns of LEDs in the matrix of LEDs.

12. The system of claim 8 , wherein:

the register is configured to define a scanning sequence of the plurality of scan lines.

13. The system of claim 12 , wherein:

in response to the scanning sequence, the first driver IC is configured to control one or more of the set of line switches of the second driver IC to drive one or more LEDs in the first set of columns of LEDs.

14. An electrical circuit for driving light emitting diodes (LEDs) comprising:

a substrate including a plurality of scan lines substantially orthogonal to a virtual centerline of the substrate;

a first driver integrated circuit (IC) on a first side of the substrate, the first driver IC including a set of line switches coupled to a first set of the plurality of scan lines along a side of the first driver IC nearest the virtual centerline; and

a second driver IC on the first side of the substrate, the second driver IC including a set of line switches coupled to a second set of the plurality of scan lines along a side of the second IC nearest the virtual centerline;

wherein the first driver IC is configured to control the set of line switches of the second driver IC based on a scanning sequence of the plurality of scan lines;

wherein the scanning sequence is stored in a register via a digital core; and

wherein the scanning sequence is configured to be programmed through a communications interface responsive to signals provided at a data input and a clock input.

15. The electrical circuit of claim 14 , wherein:

the first set of the plurality of scan lines are interlaced with the second set of the plurality of scan lines.

16. The electrical circuit of claim 14 , wherein:

the first driver IC and the second driver IC are each respective light emitting diode (LED) driver IC devices; and

a second side of the substrate includes a plurality of LEDs in a matrix of rows and columns.

17. The electrical circuit of claim 16 , wherein:

each of the rows of LEDs is coupled to a respective one of the plurality of scan lines.

18. The electrical circuit of claim 16 , wherein:

the first driver IC is configured to drive a first set of the columns of LEDs; and

the second driver IC is configured to drive a second set of the columns of LEDs.

19. The electrical circuit of claim 14 , wherein:

the scanning sequence of the plurality of scan lines is stored in the register of the first driver IC.

20. The electrical circuit of claim 14 , wherein:

a data output terminal of the first driver IC is coupled to a data input terminal of the second driver IC.

Continuity (3)
Continuation 17489228 · Sep 29, 2021
Provisional Application 63236592 · Aug 24, 2021
Related Publication 20230232513A1 · Jul 20, 2023