IP Library › Granted Patent US 11,917,869
Granted Patent B2
US 11,917,869 · App. 17/548,760 · Granted Feb 27, 2024

Display apparatus with organic material disposed in groove

Inventors: Jaeneung Kim (Yongin-si, KR); Changyong Jung (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H10K59/124G09G3/3225H10K50/844H10K59/1213H10K59/1216H10K59/131H10K77/111G09G2380/02H10K2102/311
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Quick Facts
Patent No.
US 11,917,869
App. No.
17/548,760
Granted
Feb 27, 2024
Kind
B2
Abstract

A display apparatus includes a substrate including a display area having a plurality of pixel circuits that are spaced apart from each other. An inorganic material layer is arranged in the display area and includes a groove between adjacent pixel circuits of the plurality of pixel circuits. An organic filler is disposed in the groove. The inorganic material layer includes at least one insulating material layer and an etch stop layer. The etch stop layer includes a semiconductor material or a conductive material. The etch stop layer is provided on a bottom surface or a portion of a side wall of the groove.

Claims (52)

1. A display apparatus comprising:

a substrate including a display area having a plurality of transistors;

an inorganic material layer disposed on the substrate and having a groove between some transistors of the plurality of transistors; and

an organic material disposed in the groove,

wherein the inorganic material layer comprises at least one insulating material layer and a pattern layer,

the pattern layer comprises a semiconductor material or a conductive material, and

the pattern layer is disposed on a bottom surface or a portion of a side wall of the groove.

2. The display apparatus of claim 1 , wherein:

each of the a plurality of transistors includes a semiconductor layer and a gate electrode; and

the pattern layer is disposed on a same layer as the semiconductor layer and includes a same material as a material of the semiconductor layer.

3. The display apparatus of claim 1 , wherein:

each of the a plurality of transistors includes a semiconductor layer and a gate electrode; and

the pattern layer is disposed on a same layer as the gate electrode and includes a same material as a material of the gate electrode.

4. The display apparatus of claim 1 , further comprising a storage capacitor, the storage capacitor is overlap with one of the plurality of transistors, wherein the pattern layer is disposed on a same layer as an electrode of the storage capacitor and includes a same material as a material of the electrode of the storage capacitor.

5. The apparatus of claim 1 , wherein:

the inorganic material layer includes a barrier layer arranged on the substrate; and

the barrier layer is continuously arranged over the plurality of transistors.

6. The display apparatus of claim 1 , wherein the organic material is disposed to surround at least a portion of the plurality of transistors.

7. The display apparatus of claim 1 , wherein the organic material extends to an upper surface of the inorganic material layer.

8. The display apparatus of claim 1 , further comprising a first connection wiring that overlaps the plurality of transistors and is arranged on the organic material.

9. The display apparatus of claim 8 , wherein:

the some transistors include a first transistor and a second transistor that are adjacent to each oilier in a first direction;

a first scanning line connected to the first transistor is separated from a second scanning line connected to the second transistor by the organic material; and

the first scanning line and the second scanning line are connected to each other by the first connection wiring.

10. The display apparatus of claim 9 , wherein an elongation rate of the first connection wiring is greater than elongation rates of the first scanning line and the second scanning line.

11. The display apparatus of claim 9 , further comprising:

an interlayer insulating layer covering the first connection wiring; and

a second connection wiring arranged on the interlayer insulating layer and configured to connect the plurality of transistors to each other.

12. The display apparatus of claim 11 , further comprising:

an opening in the interlayer insulating layer, the opening exposing the organic material; and

an upper-organic material in the opening,

wherein the first connection wiring and the second connection wiring extend in different directions from each other.

13. The display apparatus of claim 1 , wherein the groove is formed by:

etching the insulating material layer by a fluoride-based gas; and

etching the pattern layer by a chloride-based gas.

14. The display apparatus of claim 1 , further comprising:

an encapsulation layer that is configured to seal the display area, the encapsulation layer comprising at least one inorganic encapsulation layer and at least one organic encapsulation layer.

15. The display apparatus of claim 1 , wherein an upper surface of the organic material has a convex shape.

16. A display apparatus comprising:

a substrate including a display area having a plurality of transistors;

an inorganic material layer disposed on the substrate and having a groove in an area between some transistors of the plurality of transistors;

an organic material disposed in the groove; and

a recess positioned on a side wall of the groove.

17. The display apparatus of claim 16 , wherein:

the inorganic material layer includes a barrier layer arranged on the substrate; and

the barrier layer is disposed under the groove and continuously arranged over the plurality of transistors.

18. The display apparatus of claim 16 , wherein the organic material is arranged to surround at least a portion of the plurality of transistors.

19. The display apparatus of claim 16 , further comprising a first connection wiring that overlaps the plurality of transistors and is disposed on the organic material.

20. The display apparatus of claim 19 , wherein:

the some transistors include a first transistor and a second transistor that are adjacent to each other in a first direction;

a first scanning line connected to the first transistor is separated from a second scanning line connected to the second transistor by the organic material; and

the first scanning line and the second scanning line are connected to each other by the first connection wiring.

Priority Claims (1)
KR 10-2019-0031775 · Mar 20, 2019 · national
Continuity (2)
Continuation 16824846 · Mar 20, 2020
Related Publication 20220102455A1 · Mar 31, 2022
Cited By (1)
US 12,433,110