IP Library Granted Patent US 11,917,872
Granted Patent B2
US 11,917,872 · App. 16/406,243 · Granted Feb 27, 2024

Display device

Inventors: Yoonjong Cho (Yongin-si, KR); Seokje Seong (Yongin-si, KR); Jaehyun Lee (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
H10K59/131H01L27/1225H10K59/1216
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Quick Facts
Patent No.
US 11,917,872
App. No.
16/406,243
Granted
Feb 27, 2024
Kind
B2
Abstract

Provided is a display device including: a substrate having a display area and a peripheral area outside the display area; a first transistor and a second transistor each located over the display area of the substrate and arranged at different levels on the substrate; and a plurality of wirings located over the peripheral area of the substrate, wherein the plurality of wirings include first wirings and second wirings, the first wirings and the second wirings being located at different levels on the substrate and are alternately arranged with each other.

Claims (38)

1. A display device comprising:

a substrate having a display area and a peripheral area outside the display area;

a first transistor including a first gate electrode, a first semiconductor layer, and a first insulating layer disposed between the first gate electrode and the first semiconductor layer;

a capacitor overlapping the first transistor and comprising a first electrode, a second electrode, and a second insulating layer disposed between the first electrode and the second electrode, the first electrode being the first gate electrode and the second electrode overlapping the first electrode;

a third insulating layer disposed on the second electrode;

a second transistor including a second gate electrode, a second semiconductor layer, and a fourth insulating layer disposed between the second gate electrode and the second semiconductor layer, the second gate electrode of the second transistor being disposed over the first gate electrode of the first transistor and the second insulating layer and the third insulating layer being disposed between the first gate electrode and the second semiconductor layer; and

a plurality of wirings located over the peripheral area of the substrate,

wherein the plurality of wirings comprise first wirings and second wirings, the first wirings and the second wirings being located at different levels on the substrate and are alternately arranged with each other, and

wherein the first wirings and the first gate electrode are disposed on the first insulating layer to directly contact an upper surface of the first insulating layer, are disposed at a same level on the substrate, and include a same material, and the second wirings and the second gate electrode are disposed on the fourth insulating layer to directly contact an upper surface of the fourth insulating layer, are disposed at a same level on the substrate, and include a same material.

2. The display device of claim 1 , wherein the first semiconductor layer includes polycrystalline silicon, and the second semiconductor layer includes an oxide semiconductor.

3. The display device of claim 2 , further comprising a display element electrically connected to the first transistor,

wherein the first transistor is a driving transistor and the second transistor is a switching transistor.

4. The display device of claim 1 ,

wherein the second semiconductor layer directly contacts the third insulating layer.

5. The display device of claim 1 , wherein the second insulating layer, the third insulating layer and the fourth insulating layer are disposed between the first wirings and the second wirings.

6. The display device of claim 5 , wherein the first wirings and the second wirings at least partially overlap each other in a vertical direction.

7. The display device of claim 1 , further comprising a fifth insulating layer disposed on the second gate electrode,

wherein the peripheral area further comprises a pad area and a bending area that is disposed between the display area and the pad area,

wherein the bending area is an area from which the first insulating layer, the second insulating layer, the third insulating layer, the fourth insulating layer, and the fifth insulating layer are removed, and an organic material layer is located in the bending area.

8. The display device of claim 7 , wherein the first wirings and the second wirings include disconnected portions in the bending area, and the first wirings and the second wirings that are disconnected in the bending area are connected via a connecting wire located on the organic material layer.

9. A display device comprising:

a substrate having a display area and a peripheral area outside the display area;

a first transistor located over the display area of the substrate and comprising a first semiconductor layer including polycrystalline silicon and a first gate electrode;

a second transistor located over the display area of the substrate and comprising a second semiconductor layer including an oxide semiconductor and a second gate electrode; and

a plurality of wirings located over the peripheral area of the substrate,

wherein the first gate electrode and the second gate electrode are located at difference levels on the substrate,

wherein the plurality of wirings comprise first wirings and second wirings, the first wirings being arranged on a same layer as the first gate electrode and the second wirings being arranged on a same layer as the second gate electrode,

wherein the display device further comprises a capacitor overlapping the first transistor, the capacitor comprising a first electrode and a second electrode, the first electrode being arranged on a same layer as the first gate electrode, and the second electrode being arranged on and overlapping the first electrode,

wherein the display device further comprises a first insulating layer disposed between the first semiconductor layer and the first gate electrode, a second insulating layer disposed between the first gate electrode and the second electrode, a third insulating layer disposed between the second electrode and the second semiconductor layer, a fourth insulating layer disposed between the second semiconductor layer and the second gate electrode, and a fifth insulating layer disposed on the second gate electrode,

wherein the peripheral area further comprises a pad area and a bending area that is disposed between the display area and the pad area, and

wherein the bending area is an area from which the first insulating layer, the second insulating layer, the third insulating layer, the fourth insulating layer, and the fifth insulating layer are removed, and an organic material layer is located in the bending area.

10. The display device of claim 9 , wherein the first wirings and the second wirings are alternately arranged with each other.

11. The display device of claim 9 , wherein the first wirings and the second wirings at least partially overlap each other in a vertical direction.

12. The display device of claim 9 , further comprising an organic light-emitting device electrically connected to the first transistor,

wherein the first transistor is a driving transistor and the second transistor is a switching transistor.

13. The display device of claim 9 , wherein the first transistor further comprises a first source electrode and a first drain electrode that are located on the fifth insulating layer and electrically connected to the first semiconductor layer,

wherein the second transistor further comprises a second source electrode and a second drain electrode that are located on the fifth insulating layer and electrically connected to the second semiconductor layer.

14. The display device of claim 9 , wherein the first wirings and the second wirings include disconnected portions in the bending area, and the first wirings and the second wirings that are disconnected in the bending area are connected via a connecting wire located on the organic material layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2019
From: CHO, YOONJONG; SEONG, SEOKJE; LEE, JAEHYUN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 049474/0298 →
Priority Claims (1)
KR 10-2018-0111031 · Sep 17, 2018 · national
Continuity (1)
Related Publication 20200091268A1 · Mar 19, 2020
Cited By (1)
US 12,531,022