Display substrate and display apparatus
Disclosed is a display substrate, including: a base including a display region and a peripheral region; sub-pixels in the display region; data lines in at least the display region and extending in a first direction and electrically connected to the sub-pixels; gate lines in at least the display region and extending in a second direction intersecting with the first direction, and electrically connected to the sub-pixels; pads in the peripheral region; data leads in the peripheral region and electrically connected to the data lines and the pads; a gate driver circuit in the peripheral region and electrically connected to the gate lines; gate drive lines in the peripheral region and electrically connected to the gate driver circuit; gate leads in the peripheral region and extending in the first direction, which are electrically connected to the gate drive lines and the pads and located between the data leads.
1. A display substrate, comprising:
a base comprising a display region and a peripheral region surrounding the display region;
a plurality of sub-pixels in the display region;
a plurality of data lines located in at least the display region and extending in a first direction, wherein the plurality of data lines are electrically connected to the plurality of sub-pixels;
a plurality of gate lines located in at least the display region and extending in a second direction, wherein the plurality of gate lines are electrically connected to the plurality of sub-pixels, and the first direction intersects with the second direction;
a plurality of pads in the peripheral region;
a plurality of data leads located in the peripheral region and electrically connected to the plurality of data lines and a plurality of the pads, wherein the plurality of data leads comprise a first group of data leads and a second group of data leads;
a gate driver circuit located in the peripheral region and electrically connected to the plurality of gate lines;
a plurality of gate drive lines located in the peripheral region and at least partially surrounding the display region, wherein the plurality of gate drive lines are electrically connected to the gate driver circuit;
a plurality of gate leads located in the peripheral region and extending in the first direction, wherein the plurality of gate leads are electrically connected to the plurality of gate drive lines and a plurality of the pads; and the plurality of gate leads are located between the first group of data leads and the second group of data leads;
a plurality of control lines located in at least the display region and extending in the second direction, wherein the plurality of control lines are electrically connected to the plurality of sub-pixels;
a control driver circuit located in the peripheral region and electrically connected to the plurality of control lines;
a plurality of control drive lines located in the peripheral region and at least partially surrounding the display region, wherein the plurality of control drive lines are electrically connected to the control driver circuit; and
a plurality of control leads located in the peripheral region and extending in the first direction, wherein the plurality of control leads are electrically connected to the plurality of control drive lines and a plurality of the pads; and the plurality of control leads are located between the first group of data leads and the second group of data leads.
2. The display substrate according to claim 1 , wherein
the plurality of gate drive lines comprise a gate start signal line, a first gate clock signal line, a second gate clock signal line, a gate drive test line, a high-level signal line, and a low-level signal line.
3. The display substrate according to claim 1 , wherein
the plurality of control drive lines comprise a control start signal line, a first control clock signal line, a second control clock signal line, a control drive test line, a high-level signal line, and a low-level signal line.
4. The display substrate according to claim 1 , wherein
the gate driver circuit and the control driver circuit are located on two opposite sides of the display region along the second direction.
5. A display substrate, comprising:
a base comprising a display region and a peripheral region surrounding the display region;
a plurality of sub-pixels in the display region;
a plurality of data lines located in at least the display region and extending in a first direction, wherein the plurality of data lines are electrically connected to the plurality of sub-pixels;
a plurality of gate lines located in at least the display region and extending in a second direction, wherein the plurality of gate lines are electrically connected to the plurality of sub-pixels, and the first direction intersects with the second direction;
a plurality of pads in the peripheral region;
a plurality of data leads located in the peripheral region and electrically connected to the plurality of data lines and a plurality of the pads, wherein the plurality of data leads comprise a first group of data leads and a second group of data leads;
a gate driver circuit located in the peripheral region and electrically connected to the plurality of gate lines;
a plurality of gate drive lines located in the peripheral region and at least partially surrounding the display region, wherein the plurality of gate drive lines are electrically connected to the gate driver circuit;
a plurality of gate leads located in the peripheral region and extending in the first direction, wherein the plurality of gate leads are electrically connected to the plurality of gate drive lines and a plurality of the pads; and the plurality of gate leads are located between the first group of data leads and the second group of data leads;
a multiplexing circuit located in the peripheral region and electrically connected to the plurality of data lines;
a plurality of data drive lines located in the peripheral region and at least partially surrounding the display region, wherein the multiplexing circuit is electrically connected to the plurality of data drive lines and the plurality of data leads;
a plurality of multiplexing drive lines located in the peripheral region and at least partially surrounding the display region, wherein the plurality of multiplexing drive lines are electrically connected to the multiplexing circuit; and
a plurality of multiplexing leads located in the peripheral region and extending in the first direction, wherein the plurality of multiplexing leads are electrically connected to the plurality of multiplexing drive lines and a plurality of the pads; and
the plurality of multiplexing leads are located between the first group of data leads and the second group of data leads.
6. The display substrate according to claim 5 , wherein
the plurality of gate drive lines, the plurality of multiplexing drive lines and the plurality of data drive lines are located on a side of the gate driver circuit and the multiplexing circuit away from the display region.
7. The display substrate according to claim 6 , wherein
the plurality of multiplexing drive lines are located on a side of the plurality of gate drive lines away from the display region; and
the plurality of data drive lines are located on a side of the plurality of multiplexing drive lines away from the display region.
8. A display substrate, comprising:
a base comprising a display region and a peripheral region surrounding the display region;
a plurality of sub-pixels in the display region;
a plurality of data lines located in at least the display region and extending in a first direction, wherein the plurality of data lines are electrically connected to the plurality of sub-pixels;
a plurality of gate lines located in at least the display region and extending in a second direction, wherein the plurality of gate lines are electrically connected to the plurality of sub-pixels, and the first direction intersects with the second direction;
a plurality of pads in the peripheral region;
a plurality of data leads located in the peripheral region and electrically connected to the plurality of data lines and a plurality of the pads, wherein the plurality of data leads comprise a first group of data leads and a second group of data leads;
a gate driver circuit located in the peripheral region and electrically connected to the plurality of gate lines;
a plurality of gate drive lines located in the peripheral region and at least partially surrounding the display region, wherein the plurality of gate drive lines are electrically connected to the gate driver circuit;
a plurality of gate leads located in the peripheral region and extending in the first direction, wherein the plurality of gate leads are electrically connected to the plurality of gate drive lines and a plurality of the pads; and the plurality of gate leads are located between the first group of data leads and the second group of data leads;
a test circuit located in the peripheral region and electrically connected to the plurality of data lines;
a plurality of test drive lines located in the peripheral region and at least partially surrounding the display region, wherein the plurality of test drive lines are electrically connected to the test circuit; and
a plurality of test leads located in the peripheral region and extending in the first direction, wherein the plurality of test leads are electrically connected to the plurality of test drive lines and a plurality of the pads; and the plurality of test leads are located between the first group of data leads and the second group of data leads.
9. The display substrate according to claim 8 , wherein
the plurality of test drive lines comprise a test data signal line and a test control signal line.
10. The display substrate according to claim 8 , further comprising:
a multiplexing circuit located in the peripheral region and electrically connected to the plurality of data lines; wherein
the test circuit and the multiplexing circuit are located on two opposite sides of the display region along the first direction; and
the plurality of pads are located on a side of the multiplexing circuit away from the display region.
11. The display substrate according to claim 1 , further comprising:
an electrostatic discharge circuit in the peripheral region;
an electrostatic discharge drive line located in the peripheral region and at least partially surrounding the display region, wherein the electrostatic discharge drive line is electrically connected to the electrostatic discharge circuit; and
an electrostatic discharge lead located in the peripheral region and extending in the first direction, wherein the electrostatic discharge lead is electrically connected to the electrostatic discharge drive line and a pad; and the electrostatic discharge lead is located between the first group of data leads and the second group of data leads.
12. The display substrate according to claim 1 , further comprising:
an initialization drive line located in the peripheral region and at least partially surrounding the display region, wherein the initialization drive line is electrically connected to the plurality of sub-pixels; and
an initialization lead located in the peripheral region and extending in the first direction, wherein the initialization lead is electrically connected to the initialization drive line and pads; and the initialization lead is located between the first group of data leads and the second group of data leads.
13. The display substrate according to claim 1 , further comprising:
a first power drive line located in the peripheral region and at least partially surrounding the display region, wherein the first power drive line is electrically connected to the plurality of sub-pixels;
a first power lead located in the peripheral region and extending in the first direction, wherein the first power lead is electrically connected to the first power drive line and pads; and the first power lead is located between the first group of data leads and the second group of data leads;
a second power drive line located in the peripheral region and at least partially surrounding the display region, wherein the second power drive line is electrically connected to the plurality of sub-pixels; and
a second power lead located in the peripheral region and extending in the first direction, wherein the second power lead is electrically connected to the second power drive line and pads; and the second power lead is located on a side of the first group of data leads away from the second group of data leads, or located on a side of the second group of data leads away from the first group of data leads.
14. The display substrate according to claim 1 , wherein the peripheral region comprises an access region and a lead-out region, in the first direction, the access region is located on a side of the display region, and the lead-out region is located between the access region and the display region; the plurality of pads are located in the access region and arranged along the second direction; the plurality of gate leads and the plurality of data leads are located in the lead-out region; and in the second direction, the plurality of gate leads are located between the first group of data leads and the second group of data leads.
15. The display substrate according to claim 14 , wherein
in the second direction, a plurality of the pads electrically connected to the plurality of gate leads are located between a plurality of the pads electrically connected to the first group of data leads and a plurality of the pads electrically connected to the second group of data leads.
16. The display substrate according to claim 14 , wherein
in the second direction, a plurality of the pads electrically connected to the plurality of data leads are located between a plurality of the pads electrically connected to the plurality of gate leads and a plurality of the pads electrically connected to the plurality of control leads.
17. The display substrate according to claim 14 , further comprising:
a first power drive line located in the peripheral region and at least partially surrounding the display region, wherein the first power drive line is electrically connected to the plurality of sub-pixels;
a first power lead located in the peripheral region and extending in the first direction, wherein the first power lead is electrically connected to the first power drive line and pads; and the first power lead is located between the first group of data leads and the second group of data leads;
a second power drive line located in the peripheral region and at least partially surrounding the display region, wherein the second power drive line is electrically connected to the plurality of sub-pixels; and
a second power lead located in the peripheral region and extending in the first direction, wherein the second power lead is electrically connected to the second power drive line and pads; and the second power lead is located on a side of the first group of data leads away from the second group of data leads, or located on a side of the second group of data leads away from the first group of data leads;
in the second direction, the pads electrically connected to the first power lead are located on a side of the pads electrically connected to the first group of data leads away from the pads electrically connected to the second group of data leads, or located on a side of the pads electrically connected to the second group of data leads away from the pads electrically connected to the first group of data leads; and
in the second direction, the pads electrically connected to the second power lead are located on a side of the pads electrically connected to the first group of data leads away from the pads electrically connected to the second group of data leads, or located on a side of the pads electrically connected to the second group of data leads away from the pads electrically connected to the first group of data leads.
18. The display substrate according to claim 1 , wherein
the display region is substantially circular; and
the display substrate is substantially circular.
19. A display apparatus, comprising: the display substrate according to claim 1 .