IP Library Granted Patent US 11,922,883
Granted Patent B2
US 11,922,883 · App. 18/063,203 · Granted Mar 5, 2024

Pixel, organic light emitting display device using the same, and method of driving the organic light emitting display device

Inventors: Jin Tae Jeong (Yongin-si, KR); Min Ku Lee (Yongin-si, KR); Ji Hyun Ka (Yongin-si, KR); Tae Hoon Kwon (Yongin-si, KR); Seung Kyu Lee (Yongin-si, KR); Seung Ji Cha (Yongin-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
G09G3/3258G09G3/3225H10K59/123G09G2300/0819G09G2310/0216G09G2310/0251G09G2310/0262G09G2320/0214G09G2320/0238G09G2320/045
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Quick Facts
Patent No.
US 11,922,883
App. No.
18/063,203
Granted
Mar 5, 2024
Kind
B2
Abstract

A pixel includes an organic light emitting diode (OLED), a pixel circuit, and first and second transistors. The OLD includes a cathode electrode connected to a second power source. The pixel circuit includes a driving transistor having a gate electrode initialized by a third power source. The driving transistor controls the amount of current flowing from a first power source to the second power source via the OLED. The first transistor is connected between a fourth power source and the second power source and an anode electrode of the OLED. The first transistor is turned on based on a scan signal is supplied to a scan line. The second transistor is connected between a data line and the pixel circuit. The second transistor is turned on when the scan signal is supplied to the ith scan line.

Claims (48)

1. A pixel comprising:

a driving transistor connected to a first node and having a gate electrode connected to a second node, the first node connected to a first power source;

a light emitting element connected between a third node and a second power source, the third node connected between the driving transistor and the light emitting element;

a first transistor connected between the third node and a first initializing power line to initialize a voltage of the third node;

a second transistor connected between a data line and the first node and having a gate electrode connected to a first scan line;

a third transistor connected between the gate electrode of the driving transistor and a second initializing power line to initialize a voltage of the gate electrode of the driving transistor;

a fourth transistor connected between the third node and the gate electrode of the driving transistor and having a gate electrode connected to the first scan line; and

a fifth transistor connected between the first node and the first power source and having a gate electrode connected to an emission control line,

wherein the second initializing power line has a voltage greater than a voltage of the first initializing power line, and

wherein:

a first signal is supplied through the first scan line;

a second signal is supplied through the emission control line;

the second transistor is turned on in response to the first signal enabled in a first time period; and

the fifth transistor is turned on in response to the second signal enabled in a second time period,

the second time period does not overlap the first time period.

2. The pixel of claim 1 , further comprising a sixth transistor connected between the third node and the light emitting element and having a gate electrode connected to the emission control line.

3. The pixel of claim 1 , further comprising a capacitor connected between the first power source and the second node.

4. The pixel of claim 1 , wherein the first node is directly connected to the driving transistor, the second transistor, and the fifth transistor.

5. The pixel of claim 1 , wherein the third node is directly connected to the driving transistor and the fourth transistor.

6. The pixel of claim 1 , wherein the first transistor has a gate electrode connected to the first scan line.

7. The pixel of claim 1 , wherein the third transistor has a gate electrode connected to a second scan line different from the first scan line.

8. The pixel of claim 1 , wherein the fifth transistor has a turn-on period that does not overlap a turn-on period of the second transistor.

9. The pixel of claim 1 , wherein the voltage of the first initializing power line is greater than a voltage of the second power source.

10. The pixel of claim 1 , wherein the voltage of the second initializing power line is lower than a voltage of a data signal of the data line.

11. A display device comprising:

pixels connected to scan lines, data lines, and emission control lines;

a scan driver to supply scan signals to the scan lines;

an emission control driver to supply emission control signals to the emission control lines; and

a data driver to supply data signals to the data lines,

one of the pixels comprises:

a driving transistor connected to a first node and having a gate electrode connected to a second node, the first node connected to a first power source;

a light emitting element connected between a third node and a second power source, the third node connected between the driving transistor and the light emitting element;

a first transistor connected between the third node and a first initializing power line to initialize a voltage of the third node;

a second transistor connected between one of the data lines and the first node and having a gate electrode connected to a first one of the scan lines;

a third transistor connected between the gate electrode of the driving transistor and a second initializing power line to initialize a voltage of the gate electrode of the driving transistor;

a fourth transistor connected between the third node and the gate electrode of the driving transistor and having a gate electrode connected to the first one of the scan lines; and

a fifth transistor connected between the first node and the first power source and having a gate electrode connected to one of the emission control lines,

wherein the second initializing power line has a voltage greater than a voltage of the first initializing power line, and

wherein:

a first signal is supplied through the first scan line;

a second signal is supplied through the emission control line;

the second transistor is turned on in response to the first signal enabled in a first time period; and

the fifth transistor is turned on in response to the second signal enabled in a second time period,

the second time period does not overlap the first time period.

12. The display device of claim 11 , wherein the first node is directly connected to the driving transistor, the second transistor, and the fifth transistor.

13. The display device of claim 11 , wherein the third node is directly connected to the driving transistor and the fourth transistor.

14. The display device of claim 11 , wherein the first transistor has a gate electrode connected to the first one of the scan lines.

15. The display device of claim 14 , wherein the third transistor has a gate electrode connected to a second one of the scan lines different from the first one of the scan lines.

Priority Claims (1)
KR 10-2016-0075520 · Jun 17, 2016 · national
Continuity (3)
Continuation 16436016 · Jun 10, 2019
Continuation 15601012 · May 22, 2017
Related Publication 20230119752A1 · Apr 20, 2023
Cited By (1)
US 12,439,698