Tracking charge loss in memory sub-systems
Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include, identifying a block family comprising a plurality of blocks of the memory device. The operations performed by the processing device further include associating the block family with a threshold voltage offset. The operations performed by the processing device further include computing an adjustment value of the threshold voltage offset, wherein the adjustment value reflects a time period that has elapsed since a triggering event and a temperature of a memory component carrying one or more blocks of the plurality of blocks.
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
identifying a block family comprising a plurality of blocks of the memory device;
associating the block family with a threshold voltage offset;
computing an adjustment value of the threshold voltage offset, wherein the adjustment value reflects a time period that has elapsed since a triggering event and a temperature of a memory component carrying one or more blocks of the plurality of blocks;
determining that the adjustment value satisfies a threshold voltage criterion, wherein the threshold voltage criterion comprises a reference voltage level corresponding to known valley margins of the memory device; and
responsive to determining that the adjustment value satisfies the threshold voltage criterion, updating the threshold voltage offset.
2. The system of claim 1 , wherein the operations further comprise:
responsive to determining that the adjustment value satisfies the threshold voltage criterion, scanning the block family.
3. The system of claim 1 , wherein a triggering event is a memory cell programming event associated with the block family.
4. The system of claim 1 , wherein the adjustment value is represented by a function of time raised to a power of a first coefficient and multiplied by a second coefficient, wherein at least one of the first and the second coefficients reflects the temperature of the memory component.
5. The system of claim 1 , wherein the operations further comprise:
storing, on the memory device, metadata reflecting the adjustment value and the threshold voltage offset.
6. The system of claim 1 , wherein computing the adjustment value of the threshold voltage offset is performed by a hardware accelerator.
7. The system of claim 1 , wherein the block family comprising the plurality of blocks of the memory device is identified randomly from the plurality of blocks of the memory device.
8. A method comprising:
identifying, by a processing device, a block family comprising a plurality of blocks of a memory device, wherein the block family is associated with a threshold voltage offset;
determining, by the processing device, an average temperature of a memory component carrying one or more blocks of the plurality of blocks;
computing an adjustment value of the threshold voltage offset, wherein the adjustment value reflects a time period that has elapsed since a triggering event and the average temperature of the memory component;
determining that the adjustment value satisfies a threshold voltage criterion, wherein the threshold voltage criterion comprises a reference voltage level corresponding to known valley margins of the memory device;
responsive to determining that the adjustment value satisfies the threshold voltage criterion, scanning one or more blocks of the block family; and
updating, based on the adjustment value, the threshold voltage offset associated with the block family.
9. The method of claim 8 , further comprising:
responsive to determining that the adjustment value satisfies the threshold voltage criterion, scanning the block family.
10. The method of claim 8 , wherein a triggering event comprises a memory cell programming event associated with the block family.
11. The method of claim 8 , wherein the adjustment value is represented by a function of time raised to a power of a first coefficient and multiplied by a second coefficient, wherein at least one of the first and second coefficients reflects the temperature of the memory component.
12. The method of claim 8 , further comprising storing metadata reflecting the adjustment value and the threshold voltage offset at the memory device.
13. The method of claim 8 , wherein computing the adjustment value of the threshold voltage offset is performed by a hardware accelerator.
14. The method of claim 8 , wherein the block family comprising the plurality of blocks of the memory device is identified randomly from the plurality of blocks of the memory device.
15. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
identifying a block family comprising a plurality of blocks of a memory device; associating the block family with a threshold voltage offset;
computing an adjustment value of the threshold voltage offset, wherein the adjustment value reflects a time period that has elapsed since a triggering event and a temperature of a memory component carrying one or more blocks of the plurality of blocks;
determining that the adjustment value satisfies a threshold voltage criterion, wherein the threshold voltage criterion comprises a reference voltage level corresponding to known valley margins of the memory device; and
responsive to determining that the adjustment value satisfies the threshold voltage criterion, updating the threshold voltage offset.
16. The non-transitory computer-readable storage medium of claim 15 , further comprising:
responsive to determining that the adjustment value satisfies the threshold voltage criterion, scanning the block family.
17. The non-transitory computer-readable storage medium of claim 15 , wherein a triggering event comprises a memory cell programming event associated with the block family.
18. The non-transitory computer-readable storage medium of claim 15 , wherein the adjustment value is represented by a function of time raised to a power of a first coefficient and multiplied by a second coefficient, wherein at least one of the first and second coefficients reflects the temperature of the memory component.
19. The non-transitory computer-readable storage medium of claim 15 , further comprising storing metadata reflecting the adjustment value and the threshold voltage offset at the memory device.
20. The non-transitory computer-readable storage medium of claim 15 , wherein computing the adjustment value of the threshold voltage offset is performed by a hardware accelerator.