IP Library › Granted Patent US 11,923,806
Granted Patent B2
US 11,923,806 · App. 17/351,768 · Granted Mar 5, 2024

Systems and methods for providing an envelope tracking supply voltage

Inventor: Nadim Khlat (Cugnaux, FR)
Assignee: Qorvo US, Inc.
H03F1/0233H03F1/0227H03F1/3241H03F1/3258H03F1/56H03F3/195H03F3/21H03F3/245H03F2200/102H03F2200/105H03F2200/451H03F2201/3209
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Quick Facts
Patent No.
US 11,923,806
App. No.
17/351,768
Granted
Mar 5, 2024
Kind
B2
Abstract

Envelope tracking power supply circuitry includes a look up table (LUT) configured to provide a target supply voltage based on a power envelope measurement. The target supply voltage is dynamically adjusted based on a delay between the power envelope of an RF signal and a provided envelope tracking supply voltage. The envelope tracking supply voltage is generated from the adjusted target supply voltage in order to synchronize the envelope tracking supply voltage with the power envelope of the RF signal.

Claims (40)

1. Envelope synchronization circuitry comprising:

a target voltage input at which a target voltage is provided;

an inverted target voltage input at which an inverted version of the target voltage is provided;

an operational amplifier comprising an inverting input, a non-inverting input coupled to a fixed potential, and an output at which an adjusted target supply voltage is provided;

a first adjustable resistor coupled between the target voltage input and the inverting input of the operational amplifier;

a second adjustable resistor coupled between the inverting input of the operational amplifier and the output of the operational amplifier;

a capacitor coupled between the inverting input and an intermediate node;

a first switch coupled between the intermediate node and the target voltage input; and

a second switch coupled between the inverted target voltage input and the intermediate node.

2. The envelope synchronization circuitry of claim 1 further comprising control circuitry coupled to the first adjustable resistor, the second adjustable resistor, the first switch, and the second switch.

3. The envelope synchronization circuitry of claim 2 wherein the control circuitry is configured to:

in a first mode of operation, close the first switch and open the second switch such that the envelope synchronization circuitry provides a negative group delay between the target voltage input and the output of the operational amplifier; and

in a second mode of operation, open the first switch and close the second switch such that the envelope synchronization circuitry provides a positive group delay between the target voltage input and the output of the operational amplifier.

4. The envelope synchronization circuitry of claim 3 wherein the control circuitry is further configured to adjust a resistance of the first adjustable resistor and a resistance of the second adjustable resistor to control a magnitude of group delay between the target voltage input and the output of the operational amplifier.

5. The envelope synchronization circuitry of claim 4 wherein the control circuitry is configured to adjust the resistance of the first adjustable resistor and the resistance of the second adjustable resistor based on a delay measurement, wherein the delay measurement indicates a delay between the target voltage and a power envelope of an RF signal.

6. The envelope synchronization circuitry of claim 5 wherein the control circuitry is further configured to adjust the resistance of the first adjustable resistor and the resistance of the second adjustable resistor based on a derivative of the target voltage over time.

7. The envelope synchronization circuitry of claim 6 wherein the control circuitry is further configured to adjust the resistance of the first adjustable resistor and the resistance of the second adjustable resistor such that a gain of the envelope synchronization circuitry is non-linear with respect to the derivative of the target voltage over time.

8. The envelope synchronization circuitry of claim 7 wherein the control circuitry is further configured to adjust the resistance of the first adjustable resistor and the resistance of the second adjustable resistor such that the gain of the envelope synchronization circuitry is proportional to an absolute value of the derivative of the target voltage over time.

9. A radio frequency (RF) system comprising:

one or more RF power amplifiers configured to amplify an RF input signal based on an envelope tracking supply voltage to provide an RF output signal;

envelope tracking power supply circuitry coupled to the one or more RF power amplifiers and comprising:

envelope synchronization circuitry configured to adjust a target supply voltage to provide an adjusted target supply voltage, the envelope synchronization circuitry comprising:

a target voltage input at which the target voltage is provided;

an inverted target voltage input at which an inverted version of the target voltage is provided;

an operational amplifier comprising an inverting input, a non-inverting input coupled to a fixed potential, and an output at which the adjusted target supply voltage is provided;

a first adjustable resistor coupled between the target voltage input and the inverting input of the operational amplifier;

a second adjustable resistor coupled between the inverting input of the operational amplifier and the output of the operational amplifier;

a capacitor coupled between the inverting input and an intermediate node;

a first switch coupled between the intermediate node and the target voltage input; and

a second switch coupled between the inverted target voltage input and the intermediate node; and

envelope tracking modulator circuitry coupled to the envelope synchronization circuitry and configured to provide the envelope tracking supply voltage based on the adjusted target supply voltage.

10. The RF system of claim 9 wherein the envelope synchronization circuitry further comprises control circuitry coupled to the first adjustable resistor, the second adjustable resistor, the first switch, and the second switch.

11. The RF system of claim 10 wherein the control circuitry is configured to:

in a first mode of operation, close the first switch and open the second switch such that the envelope synchronization circuitry provides a negative group delay between the target voltage input and the output of the operational amplifier; and

in a second mode of operation, open the first switch and close the second switch such that the envelope synchronization circuitry provides a positive group delay between the target voltage input and the output of the operational amplifier.

12. The RF system of claim 11 wherein the control circuitry is further configured to adjust a resistance of the first adjustable resistor and a resistance of the second adjustable resistor to control a magnitude of group delay between the target voltage input and the output of the operational amplifier.

13. The RF system of claim 12 wherein the control circuitry is configured to adjust the resistance of the first adjustable resistor and the resistance of the second adjustable resistor based on a delay measurement, wherein the delay measurement indicates a delay between the target voltage and a power envelope of the RF input signal.

14. The RF system of claim 13 wherein the control circuitry is further configured to adjust the resistance of the first adjustable resistor and the resistance of the second adjustable resistor based on a derivative of the target voltage over time.

15. The RF system of claim 14 wherein the control circuitry is further configured to adjust the resistance of the first adjustable resistor and the resistance of the second adjustable resistor such that a gain of the envelope synchronization circuitry is non-linear with respect to the derivative of the target voltage over time.

16. The RF system of claim 15 wherein the control circuitry is further configured to adjust the resistance of the first adjustable resistor and the resistance of the second adjustable resistor such that the gain of the envelope synchronization circuitry is proportional to an absolute value of the derivative of the target voltage over time.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2021
From: KHLAT, NADIM
To: QORVO US, INC.
Reel/Frame 056628/0297 →
Continuity (7)
Provisional Application 63064773 · Aug 12, 2020
Provisional Application 63064784 · Aug 12, 2020
Provisional Application 63090566 · Oct 12, 2020
Provisional Application 63090574 · Oct 12, 2020
Provisional Application 63090583 · Oct 12, 2020
Provisional Application 63112430 · Nov 11, 2020
Related Publication 20220052650A1 · Feb 17, 2022
Cited By (2)
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