IP Library › Granted Patent US 11,934,812
Granted Patent B2
US 11,934,812 · App. 17/567,047 · Granted Mar 19, 2024

On-target unit testing

Inventors: Shayan Mukhtar (Mississauga, CA); Richard Stephen Chelminski (Oakland, CA)
Assignee: Rivian IP Holdings, LLC
G06F8/4434G06F8/43
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Quick Facts
Patent No.
US 11,934,812
App. No.
17/567,047
Granted
Mar 19, 2024
Kind
B2
Abstract

The present disclosure is directed to systems and methods directed to improving the functions of a vehicle. Systems and methods are provided that provide a custom tool that autogenerates a set of software agents that allows a system to separate processing, transmission and receiving of messages to achieve better synchronization. The disclosure herein also provides a simplified method of key provisioning by designating one client as a server and assigning a symmetric key to every other client permanently provisioned between that client and the server. Systems and method are further provided that predict faults in a vehicle. Systems and methods are also provided that preserve data in the event of a system crash. Systems and methods are also provided in which an operating system of a vehicle detects the presence of a new peripheral and pulls the related interface file for that new peripheral. Further, a data synchronization solution is provided herein which provides optimized levels of synchronization.

Claims (37)

1. A method for overloading a function, the method comprising:

compiling a first image comprising first assembler code defining a first version of the function stored at a first memory address,

compiling a second image comprising second assembler code defining a second version of the function stored at a second memory address, and

generating a stitched super-image by:

placing the first assembler code and the second assembler code into a memory partition, wherein the second assembler code is adjusted to not conflict with the first assembler code, and

generating a table in the memory partition that is used to selectively call either one of the first version of the function and the second version of the function.

2. The method of claim 1 , wherein the first version of the function and the second version of the function are written in code that does not allow overloading functions.

3. The method of claim 1 , wherein the first version of the function and the second version of the function are written in C code.

4. The method of claim 1 , wherein the memory partition is located within a vehicle.

5. The method of claim 1 , wherein the table defines a respective memory address for each of the first version of the function and the second version of the function.

6. The method of claim 1 , wherein the first assembler code represents a production version of the function stored at the first memory address, and the second assembler code represents a test version of the function stored at the second memory address different from the first memory address, such that the stitched super-image within the memory partition is configured to provide the production version of the function and the test version of the function.

7. The method of claim 1 , further comprising calling each of the first version of the function and the second version of the function in the stitched super-image based on the table.

8. A system for overloading a function, the system comprising:

memory comprising a memory partition,

processing circuitry coupled to the memory configured to:

compile a first image comprising first assembler code defining a first version of the function stored at a first memory address,

compile a second image comprising second assembler code defining a second version of the function stored at a second memory address, and

generate a stitched super-image by

placing the first assembler code and the second assembler code into the memory partition, wherein the second assembler code is adjusted to not conflict with the first assembler code, and

generating a table that is used to selectively call either one of the first version of the function and the second version of the function.

9. The system of claim 8 , wherein the first version of the function and the second version of the function are written in code that does not allow overloading functions.

10. The system of claim 8 , wherein the first version of the function and the second version of the function are written in C code.

11. The system of claim 8 , wherein the memory partition is located within a vehicle.

12. The system of claim 8 , wherein the table defines a respective memory address for each of the first version of the function and the second version of the function.

13. The system of claim 8 , wherein the first assembler code represents a production version of the function stored at the first memory address, and the second assembler code represents a test version of the function stored at the second memory address different from the first memory address, such that the stitched super-image within the memory partition is configured to provide the production version of the function and the test version of the function.

14. The system of claim 8 , wherein the processing circuitry is further configured to call each of the first version of the function and the second version of the function in the stitched super-image based on the table.

15. A non-transitory computer-readable medium for overloading a function having non-transitory computer-readable instructions encoded thereon that, when executed by a processor, causes the processor to:

compile a first image comprising first assembler code defining a first version of the function stored at a first memory address,

compile a second image comprising second assembler code defining a second version of the function stored at a second memory address, and

generate a stitched super-image by

placing the first assembler code and the second assembler code into a memory partition, wherein the second assembler code is adjusted to not conflict with the first assembler code, and

generating a table that is used to selectively call either one of the first version of the function and the second version of the function.

16. The non-transitory computer-readable medium of claim 15 , wherein the first version of the function and the second version of the function are written in code that does not allow overloading functions.

17. The non-transitory computer-readable medium of claim 15 , wherein the first version of the function and the second version of the function are written in C code.

18. The non-transitory computer-readable medium of claim 15 , wherein the memory partition is located within a vehicle.

19. The non-transitory computer-readable medium of claim 15 , wherein the table defines a respective memory address for each of the first version of the function and the second version of the function.

20. The non-transitory computer-readable medium of claim 15 , wherein the first assembler code represents a production version of the function stored at the first memory address, and the second assembler code represents a test version of the function stored at the second memory address different from the first memory address, such that the stitched super-image within the memory partition is configured to provide the production version of the function and the test version of the function.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2022
From: MUKHTAR, SHAYAN; CHELMINSKI, RICHARD STEPHEN
To: RIVIAN AUTOMOTIVE, LLC
Reel/Frame 059814/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2022
From: RIVIAN AUTOMOTIVE, LLC
To: RIVIAN IP HOLDINGS, LLC
Reel/Frame 059814/0072 →
Continuity (2)
Provisional Application 63240190 · Sep 2, 2021
Related Publication 20230071041A1 · Mar 9, 2023
Cited By (1)
US 12,536,272