IP Library › Granted Patent US 11,936,434
Granted Patent B2
US 11,936,434 · App. 18/139,431 · Granted Mar 19, 2024

Systems and methods for analog computing using a linear photonic processor

Inventors: Darius Bunandar (Boston, MA); Nicholas C. Harris (Boston, MA); Michael Gould (La Honda, CA); Carl Ramey (Westborough, MA); Tomo Lazovich (Cambridge, MA)
Assignee: Lightmatter, Inc.
H04B10/801G06F1/28H03K19/21
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Quick Facts
Patent No.
US 11,936,434
App. No.
18/139,431
Granted
Mar 19, 2024
Kind
B2
Abstract

Systems and methods for performing signed matrix operations using a linear photonic processor are provided. The linear photonic processor is formed as an array of first amplitude modulators and second amplitude modulators, the first amplitude modulators configured to encode elements of a vector into first optical signals and the second amplitude modulators configured to encode a product between the vector elements and matrix elements into second optical signals. An apparatus may be used to implement a signed value of an output of the linear processor. The linear photonic processor may be configured to perform matrix-vector and/or matrix-matrix operations.

Claims (34)

1. An optical processor for performing a matrix-vector multiplication operation between an input vector and a matrix, the optical processor comprising:

a first beam splitter configured to split an input optical signal received from a light source into a plurality of input optical signals;

a first modulator configured to output a first optical signal by encoding a vector element of the input vector in an input optical signal received from the first beam splitter;

second beam splitters optically coupled to outputs of the first modulator and configured to split the first optical signal into a plurality of first optical signals;

second modulators configured to output second optical signals, wherein:

one modulator of the second modulators is optically coupled to an output of one of the second beam splitters, and

the one modulator is configured to generate one of the second optical signals by encoding, in a received first optical signal of the plurality, a value representing a multiplication of a matrix element of the matrix with the vector element encoded in the first optical signal;

optical detectors, each optically coupled to an output of a modulator of the second modulators and configured to generate a photocurrent using a received one of the second optical signals; and

a summing circuit coupled to two or more optical detectors of the optical detectors, the summing circuit being configured to generate an electrical signal representing a multiplication of the input vector and a row of the matrix.

2. The optical processor of claim 1 , wherein the first modulator comprises a variable attenuator or a variable beam splitter.

3. The optical processor of claim 1 , wherein the optical detectors are arranged in a ring configuration around the summing circuit.

4. The optical processor of claim 1 , wherein the optical detectors are arranged so that each photocurrent generated by each optical detector travels a same distance from a respective optical detector to the summing circuit.

5. The optical processor of claim 1 , wherein the summing circuit comprises voltage summer circuits.

6. The optical processor of claim 1 , wherein the summing circuit comprises a resistor network and an amplifier circuit.

7. The optical processor of claim 1 , wherein the summing circuit comprises an electrical connection tying together outputs of the two or more optical detectors.

8. The optical processor of claim 1 , further comprising the light source.

9. The optical processor of claim 8 , wherein the light source comprises a laser, a thermal light, a superluminescent diode, and/or a light emitting diode.

10. A method of performing a matrix-vector multiplication operation between an input vector and a matrix, the method comprising:

splitting, using a first beam splitter, an input optical signal received from a light source into a plurality of input optical signals;

generating a first optical signal by encoding, using a first modulator, a vector element of the input vector in an input optical signal received from the first beam splitter;

splitting, using second beam splitters optically coupled to outputs of the first modulator, the first optical signal into a plurality of first optical signals;

generating, using second modulators, second optical signals, wherein:

one of the second modulators is optically coupled to an output of one of the second beam splitters, and

the one modulator is configured to generate one of the second optical signals by encoding, in a received first optical signal of the plurality, a value representing a multiplication of a matrix element of the matrix with the vector element encoded in the first optical signal;

generating, using optical detectors, each optically coupled to an output of a second modulator of the second modulators, a photocurrent using a received one of the second optical signals; and

generating, using a summing circuit coupled to two or more optical detectors of the optical detectors, an electrical signal representing a multiplication of the input vector and a row of the matrix.

11. The method of claim 10 , wherein encoding the vector element using the first modulator comprises using a variable attenuator or a variable beam splitter.

12. The method of claim 10 , wherein generating the photocurrent using the optical detectors comprises generating the photocurrent using optical detectors that are arranged in a ring configuration around the summing circuit.

13. The method of claim 10 , wherein generating the photocurrent using the optical detectors comprises generating the photocurrent using optical detectors that are arranged so that each photocurrent generated by each optical detector travels a same distance from a respective optical detector to the summing circuit.

14. The method of claim 10 , wherein generating the electrical signal using the summing circuit comprises generating the electrical signal using voltage summer circuits.

15. The method of claim 10 , wherein generating the electrical signal using the summing circuit comprises generating the electrical signal using a circuit comprising a resistor network and an amplifier circuit.

16. The method of claim 10 , wherein generating the electrical signal using the summing circuit comprises generating the electrical signal using an electrical connection tying together outputs of the two or more optical detectors.

17. The method of claim 10 , further comprising generating the input optical signal using the light source.

18. The method of claim 17 , wherein generating the input optical signal using the light source comprises using a laser, a thermal light, a superluminescent diode, and/or a light emitting diode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2023
From: BUNANDAR, DARIUS; HARRIS, NICHOLAS C.; GOULD, MICHAEL; RAMEY, CARL; LAZOVICH, TOMO
To: LIGHTMATTER, INC.
Reel/Frame 064504/0899 →
Continuity (5)
Continuation 17840515 · Jun 14, 2022
Continuation 16940900 · Jul 28, 2020
Provisional Application 62939480 · Nov 22, 2019
Provisional Application 62879936 · Jul 29, 2019
Related Publication 20230353252A1 · Nov 2, 2023
Cited By (2)
US 12,244,354 US 12,724,589