IP Library › Granted Patent US 11,940,826
Granted Patent B2
US 11,940,826 · App. 17/572,692 · Granted Mar 26, 2024

Inductor detection

Inventors: Sachin Sudhir Turkewadikar (Bangalore, IN); Nitin Agarwal (Bangalore, IN); Madhan Radhakrishnan (Bangalore, IN)
Assignee: Texas Instruments Incorporated
G05F1/56H02M1/0045G01R31/2813H02M3/158
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Quick Facts
Patent No.
US 11,940,826
App. No.
17/572,692
Granted
Mar 26, 2024
Kind
B2
Abstract

A power control integrated circuit (IC) chip can include a direct current (DC)-DC converter that outputs a switching voltage in response to a switching output enable signal. The power control IC chip can also include an inductor detect circuit that detects whether an inductor is conductively coupled to the DC-DC converter and a powered circuit component in response to an inductor detect signal. The power control IC chip can further include control logic that (i) controls the inductor detect signal based on an enable DC-DC signal and (ii) controls the switching output enable signal provided to the DC-DC converter and a linear output disable signal provided to a linear regulator based on a signal from the inductor detect circuit indicating whether the inductor is conductively coupled to the DC-DC converter and the powered circuit component.

Claims (63)

1. A circuit comprising:

an input;

an enable input:

a first resistor having a first terminal and a second terminal;

a current source;

a first transistor including:

a first control terminal coupled to the enable input;

a first body terminal coupled to ground;

a first current terminal coupled to the input; and

a second current terminal coupled to the first terminal of the first resistor; and

a second transistor including:

a second control terminal coupled to the first terminal of the first resistor;

a second body terminal coupled to ground;

a third current terminal coupled to the current source; and

a fourth current terminal coupled to the second terminal of the first resistor.

2. The circuit of claim 1 , further comprising:

a snubber circuit coupled to the first current terminal.

3. The circuit of claim 2 , wherein:

the snubber circuit includes a second resistor coupled in series with a first capacitor and a ground.

4. The circuit of claim 1 , further comprising:

an inverter including an input terminal and an output terminal, the input terminal coupled to the third current terminal.

5. The circuit of claim 4 , further comprising:

an inductor including a first inductor terminal and a second inductor terminal, the first inductor terminal coupled to the first current terminal; and

a first output signal on the output terminal.

6. The circuit of claim 5 , wherein:

the second inductor terminal is coupled to a capacitor.

7. The circuit of claim 4 , further comprising:

an inductor not directly coupled to the first current terminal; and

a second output signal on the output terminal.

8. The circuit of claim 1 , further comprising:

a DC-DC converter coupled to the first terminal.

9. A circuit comprising:

a DC-DC converter;

a detect circuit coupled to the DC-DC converter, the detect circuit comprising:

an input coupled to the DC-DC converter;

an enable input;

a first resistor having a first terminal and a second terminal;

a current source;

a first transistor including:

a first control terminal coupled to the enable input;

a first current terminal coupled to the input; and

a second current terminal coupled to the first terminal of the first resistor; and

a second transistor including:

a second control terminal coupled to the first terminal of the first resistor;

a third current terminal coupled to the current source; and

a fourth current terminal coupled to the second terminal of the first resistor and to ground, wherein the first transistor further includes a first body terminal coupled to ground; and the second transistor further includes a second body terminal coupled to ground.

10. The circuit of claim 9 , wherein:

the first control terminal is coupled to receive an enable signal.

11. The circuit of claim 9 , further comprising:

a snubber circuit coupled to the first current terminal.

12. The circuit of claim 11 , wherein:

the snubber circuit includes a second resistor coupled in series with a capacitor and a ground.

13. The circuit of claim 9 , wherein the detect circuit further comprises:

an inverter including an input terminal and an output terminal, the input terminal coupled to the third current terminal.

14. The circuit of claim 13 , further comprising:

an inductor including a first inductor terminal and a second inductor terminal, the first inductor terminal coupled to the first current terminal; and

a first output signal on the output terminal.

15. The circuit of claim 14 , wherein:

the second inductor terminal is coupled to a capacitor.

16. The circuit of claim 13 , further comprising:

an inductor not directly coupled to the first current terminal; and

a second output signal on the output terminal.

17. The circuit of claim 9 , wherein the DC-DC converter coupled to the first terminal.

Continuity (5)
Continuation 16689545 · Nov 20, 2019
Continuation 15710883 · Sep 21, 2017
Continuation 15088612 · Apr 1, 2016
Provisional Application 62257832 · Nov 20, 2015
Related Publication 20220129024A1 · Apr 28, 2022