On-chip system with context-based energy reduction
A system for computing devices includes a central processing unit (CPU that is configured to perform in a plurality of power modes, each power mode being pre-defined to have a different code-execution performance capability than remaining ones of the plurality of power modes. The system further includes a sampling peripheral, an electrical output, and a memory device. The memory device is configured to select and execute a specific module from the plurality of modules based on the context-identifying input triggering the specific module. If triggered, each module is executed to receive the context-identifying input from the sampling peripheral, and to operate the CPU in a dedicated power mode of the plurality of power modes.
1. A system for computing devices, the system comprising:
a central processing unit (CPU) configured to perform in a plurality of power modes, each power mode being pre-defined to have a different code-execution performance capability than remaining ones of the plurality of power modes;
a sampling peripheral communicatively coupled to the CPU for receiving context-identifying input from one or more sensors, the sampling peripheral having a sampling configuration associated with a specific power mode of the plurality of power modes, the sampling configuration having an associated behavior that is specific to the sampling peripheral; and
a memory device communicatively coupled to the sampling peripheral, the memory device having stored thereon a plurality of modules, the memory device being configured to select and execute a specific module from the plurality of modules based on the context-identifying input triggering the specific module, each module being executed, if triggered, to
receive the context-identifying input from the at least one sampling peripheral, and
operate the CPU in a dedicated power mode of the plurality of power modes.
2. The system of claim 1 , further including a set of sampling peripherals that includes the sampling peripheral, each sampling peripheral of the set of sampling peripherals being dedicated to a respective power mode of the plurality of power modes, each sampling peripheral of the set of sampling peripherals having a different behavior than remaining ones of the set of sampling peripherals.
3. The system of claim 1 , wherein the plurality of modules includes:
a first module configured to operate the CPU in a first power mode of the plurality of power modes; and
a second module configured to operate the CPU in a second power mode of the plurality of power modes, the first power mode operating the CPU at a different frequency setting than in the second power mode.
4. The system of claim 3 , wherein the memory device is further configured to:
switch from the first module to the second module based on detecting that the context-identifying input is applicable to the first power mode; and
switch from the second module to the first module based on detecting that the context-identifying input is applicable to the second power mode.
5. The system of claim 1 , wherein each power mode operates in a dedicated frequency setting.
6. The system of claim 1 , wherein the memory device is a memory configuration selected from one or more of a static random access memory (SRAM) on/off configuration, a tightly-coupled-memory on/off configuration, a tightly-coupled-memory half-off configuration, and a cache on/off configuration.
7. The system of claim 1 , wherein each module operates the CPU in response to a state of the sampling peripheral, the state being an on state or an off state.
8. The system of claim 1 , wherein the context-identifying input from the one or more sensors includes one or more of a sampling rate, a sampling accuracy, and a sampling mode.
9. The system of claim 1 , further comprising an electrical output communicatively coupled to the CPU, the electrical output having an output configuration associated with a specific power mode of the plurality of power modes, the output configuration having an associated behavior that is specific to the electrical output.
10. The system of claim 9 , wherein the different code-execution performance capability includes outputting, via the electrical output, one or more of a different output rate, a different output accuracy, and a different output power.
11. The system of claim 9 , wherein the different code-execution performance capability includes turning on or off the electrical output.
12. The system of claim 1 , wherein the CPU is a system-on-a-chip (SoC) CPU.
13. The system of claim 1 , wherein each module is further executed with pre-defined performance, sensor, and output requirements.
14. The system of claim 1 , wherein the context-identifying input is based on one or more of external input, internal input, or both.
15. The system of claim 1 , wherein the memory device is further configured to switch the plurality of power modes from a first power mode to a second power mode.
16. The system of claim 1 , further comprising a non-sampling peripheral that is communicatively coupled to the CPU, the non-sampling peripheral having a non-sampling configuration associated with a specific power mode of the plurality of power modes, the non-sampling configuration having an associated behavior that is specific to the non-sampling peripheral.
17. The system of claim 16 , wherein the non-sampling peripheral is selected from a group consisting of a timer module and a cryptography module.
18. A method for selecting a power mode for a computing device, the method comprising:
operating a central processing unit (CPU) in a plurality of power modes, each power mode being pre-defined to have a different code-execution performance capability than remaining ones of the plurality of power modes;
receiving, via a sampling peripheral, context-identifying input from one or more sensors, the sampling peripheral having a sampling configuration associated with a specific power mode of the plurality of power modes, the sampling configuration having an associated behavior that is specific to the sampling peripheral;
selecting and executing, via a memory device, a specific module from a plurality of modules based on the context-identifying input triggering the specific module;
receiving, by the specific module, the context-identifying input from the sampling peripheral; and
operating, by the specific module, the CPU in a dedicated power mode of the plurality of power modes.
19. The method of claim 18 , further comprising:
in response to receiving first context-identifying input, selecting and executing a first module that operates the CPU in a first power mode of the plurality of power modes; and
in response to receiving second context-identifying input, selecting and executing a second module configured to operate the CPU in a second power mode of the plurality of power modes, the second power mode operating the CPU at a different frequency setting than in the first power mode.
20. A non-transitory computer readable medium having stored thereon software instructions that, when executed by a processor, cause the processor to:
receive, via a sampling peripheral, context-identifying input from one or more sensors, the sampling peripheral having a sampling configuration associated with a specific power mode of the plurality of power modes, the sampling configuration having an associated behavior that is specific to the sampling peripheral;
select and execute, via a memory device, a specific module from a plurality of modules based on the context-identifying input triggering the specific module;
receive, by the specific module, the context-identifying input from the sampling peripheral; and
operate, by the specific module, the CPU in a dedicated power mode of the plurality of power modes.