Mechanisms for transmission of multiple downlink control information
The disclosure provides mechanisms for transmission of multiple DCIs. An apparatus for an AN includes RF interface circuitry; and processing circuitry coupled with the interface circuitry and configured to: multiplex one or more PDCCHs carrying DCI for a UE in a TDM manner; perform a resource mapping to map the multiplexed one or more PDCCHs into frequency and time resources in a CORESET; and provide the multiplexed one or more PDCCHs to the RF interface circuitry for transmission to the UE with the frequency and time resources in the CORESET.
1. An apparatus, comprising:
radio frequency (RF) interface circuitry; and
processing circuitry coupled with the interface circuitry and configured to:
multiplex one or more physical downlink control channels (PDCCHs) carrying downlink control information (DCI) for a User Equipment (UE) in a time division multiplexing (TDM) manner;
perform a resource mapping to map the multiplexed one or more PDCCHs into frequency and time resources in a control resource set (CORESET); and
provide the multiplexed one or more PDCCHs to the RF interface circuitry for transmission to the UE with the frequency and time resources in the CORESET,
wherein the one or more PDCCHs are respectively transmitted in one or more Discrete Fourier Transform-spread-OFDM (DFT-s-OFDM) symbols maintaining a single carrier property in the CORESET.
2. The apparatus of claim 1 , wherein the processing circuitry is further configured to:
encode a shared Demodulation Reference Signal (DMRS) for the one or more PDCCHs; and
provide the shared DMRS to the RF interface circuitry for transmission to the UE with the frequency and time resources in the CORESET.
3. The apparatus of claim 2 , wherein a frequency resource allocated to the shared DMRS is same as a frequency resource allocated to each of the one or more PDCCHs.
4. The apparatus of claim 2 , wherein a frequency resource allocated to the shared DMRS spans all the frequency resource in the CORESET.
5. The apparatus of claim 2 , wherein a frequency resource allocated to the shared DMRS includes frequency resources allocated to the one or more PDCCHs.
6. The apparatus of claim 2 , wherein a frequency resource allocated to the shared DMRS is same as or larger than a union of frequency resources allocated to the one or more PDCCHs.
7. The apparatus of claim 2 , wherein a frequency resource allocated to the shared DMRS is same as or proportional to a frequency resource allocated to a PDCCH with a largest aggregation level among the one or more PDCCHs.
8. The apparatus of claim 1 , wherein a first frequency resource allocated to a first PDCCH of the one or more PDCCHs fully or partially overlaps with a second frequency resource allocated to a second PDCCH of the one or more PDCCHs.
9. The apparatus of claim 1 , wherein a first frequency resource allocated to a first PDCCH of the one or more PDCCHs does not overlap with a second frequency resource allocated to a second PDCCH of the one or more PDCCHs.
10. The apparatus of claim 1 , wherein a first frequency resource allocated to a first PDCCH of the one or more PDCCHs includes a second frequency resource allocated to a second PDCCH of the one or more PDCCHs.
11. The apparatus of claim 1 , wherein a same aggregation level is applied for the one or more PDCCHs.
12. The apparatus of claim 1 , wherein a first aggregation level for a first PDCCH of the one or more PDCCHs is 2 N times a second aggregation level for a second PDCCH of the one or more PDCCHs.
13. The apparatus of claim 1 , wherein a linkage between aggregation levels for the one or more PDCCHs is configured by higher layers via remaining minimum system information (RMSI), other system information (OSI) or dedicated radio resource control (RRC) signaling.
14. The apparatus of claim 1 , wherein the processing circuitry is configured to multiplex the one or more PDCCHs by:
appending a Cyclic Redundancy Check (CRC) code to one or more DCIs respectively carried in the one or more PDCCHs;
concatenating the CRC appended one or more DCIs and perform a joint channel coding on the concatenated DCIs; and
performing a same Discrete Fourier Transform (DFT) operation for the concatenated and coded DCIs after rate matching and modulation to provide the multiplexed one or more PDCCHs.
15. The apparatus of claim 14 , wherein a DFT size for the DFT operation is configured by higher layers via remaining minimum system information (RMSI), other system information (OSI) or radio resource control (RRC) signaling.
16. The apparatus of claim 14 , wherein a DFT size for the DFT operation is determined in accordance with aggregation levels for the one or more PDCCHs.
17. The apparatus of claim 1 , wherein the DCI comprises a joint DCI comprising one or more downlink (DL) or uplink (UL) grants.
18. The apparatus of claim 17 , wherein a number of the one or more DL or UL grants in the joint DCI is configured by higher layers via remaining minimum system information (RMSI), other system information (OSI) or radio resource control (RRC) signaling.
19. The apparatus of claim 17 , wherein the DCI comprises a field of Identifier for DCI formats to indicate a DCI format of the DCI, and the DCI format comprises a new DCI format for indicating a type of the one or more DL or UL grants and a number of the one or more DL or UL grants.
20. The apparatus of claim 17 , wherein the joint DCI is concatenated based on one or more fallback DCIs or based on one or more non-fallback DCIs.
21. The apparatus of claim 17 , wherein a size of the joint DCI is matched with a size of a DCI of a common DCI format by zero padding.
22. The apparatus of claim 17 , wherein the joint DCI comprises a common field for the one or more DL or UL grants that is used to jointly indicate scheduling of one or more DL or UL transmissions.
23. The apparatus of claim 22 , wherein the common field comprises an identifier for the joint DCI to indicate a type of the one or more DL or UL grants and a number of the one or more DL or UL grants.