IP Library › Granted Patent US 11,955,371
Granted Patent B2
US 11,955,371 · App. 17/444,669 · Granted Apr 9, 2024

Semiconductor device and method for preparing semiconductor device

Inventors: Jingwen Lu (Hefei, CN); Hai-Han Hung (Hefei, CN); Meng-Cheng Chen (Hefei, CN)
Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
H01L21/76224H01L21/31055H01L21/7682H01L21/76831H01L21/76897
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Quick Facts
Patent No.
US 11,955,371
App. No.
17/444,669
Granted
Apr 9, 2024
Kind
B2
Abstract

A method for preparing a semiconductor device includes: providing a semiconductor substrate, in which a trench is formed on the semiconductor substrate, a filling layer is formed in the trench, and a void is formed in the filling layer; removing a portion of the filling layer to expose the void; forming a plug, in which the plug is configured to plug the void and extends into the void by at least a preset distance; and removing a portion of the filling layer and remaining the plug with at least a preset height until the filling layer reaches a preset thickness to form a contact hole.

Claims (42)

1. A method for preparing a semiconductor device, comprising:

providing a semiconductor substrate, wherein a trench is formed on the semiconductor substrate, a filling layer is formed in the trench, and a void is formed in the filling layer;

removing a portion of the filling layer to expose the void;

forming a plug, wherein the plug is configured to plug the void and extends into the void by at least a preset distance; and

removing a portion of the filling layer and remaining the plug with at least a preset height until the filling layer reaches a preset thickness to form a contact hole.

2. The method for preparing the semiconductor device of claim 1 , wherein the plug is made of a silicon nitride material.

3. The method for preparing the semiconductor device of claim 1 , wherein a depth h of the plug extending into the void and a depth H of the void satisfy: ⅔H≤h≤¾H.

4. The method for preparing the semiconductor device of claim 1 , wherein forming the plug comprises:

depositing a silicon nitride material layer on a surface of the filling layer and in the void;

removing the silicon nitride material layer on the surface of the filling layer; and

remaining a silicon nitride material in the void to form the plug.

5. The method for preparing the semiconductor device of claim 4 , wherein the method, after removing the portion of the filling layer to expose the void and before depositing the silicon nitride material layer on the surface of the filling layer and in the void, further comprises:

removing a portion of a side wall of the trench.

6. The method for preparing the semiconductor device of claim 4 , wherein the silicon nitride material layer is deposited through a low pressure chemical vapor deposition process or an atomic layer deposition process.

7. The method for preparing the semiconductor device of claim 1 , wherein the method, after removing the portion of the filling layer and remaining the plug with at least a preset height until the filling layer reaches the preset thickness to form the contact hole, further comprises:

removing the plug; and

forming a wire connection structure in the contact hole, wherein the wire connection structure comprises an adhesion layer, a first conductive layer and a second conductive layer.

8. The method for preparing the semiconductor device of claim 7 , wherein the adhesion layer is a metal silicide layer.

9. The method for preparing the semiconductor device of claim 8 , wherein the adhesion layer is a cobalt silicide layer or a nickel silicide layer.

10. The method for preparing the semiconductor device of claim 7 , wherein forming the wire connection structure in the contact hole comprises:

forming the adhesion layer on a surface of the filling layer;

forming the first conductive layer on a surface of the adhesion layer and a side surface of the contact hole; and

forming the second conductive layer on a surface of the first conductive layer to fill the contact hole.

11. The method for preparing the semiconductor device of claim 10 , wherein forming the adhesion layer on the surface of the filling layer comprises:

sputtering a metal material on the surface of the filling layer, and performing a rapid thermal annealing process to form the adhesion layer on the surface of the filling layer.

12. The method for preparing the semiconductor device of claim 10 , wherein the first conductive layer is a titanium nitride layer, and the second conductive layer is a metal tungsten layer.

13. The method for preparing the semiconductor device of claim 1 , wherein the semiconductor substrate comprises a base and a support layer formed on a surface of the base, and the trench is formed in the support layer.

14. The method for preparing the semiconductor device of claim 1 , wherein the filling layer is a polycrystalline silicon layer.

15. A semiconductor device, comprising:

a semiconductor substrate, wherein a support layer is formed on the semiconductor substrate, and a trench is formed in the support layer;

a filling layer, wherein the filling layer fills a portion of the trench, and a thickness a of the filling layer and a depth b of the trench satisfy: ⅓ b a ½ b;

an adhesion layer formed on a surface of the filling layer and arranged in the trench;

a first conductive layer formed on a surface of the adhesion layer and a surface of the support layer; and

a second conductive layer formed in the first conductive layer and filling the trench.

16. The semiconductor device of claim 15 , further comprising a silicon nitride film, wherein a void is formed in the filling layer, and the silicon nitride film is formed on an inner wall surface of the void.

17. The semiconductor device of claim 15 , further comprising a bit line structure, wherein the bit line structure is formed on a surface of a base and arranged in the support layer.

18. The semiconductor device of claim 17 , further comprising an oxide layer, wherein the oxide layer is formed in the support layer and arranged on both sides of the bit line structure.

19. A semiconductor device, comprising:

a semiconductor substrate, wherein a support layer is formed on the semiconductor substrate, and a trench is formed in the support layer;

a filling layer, wherein the filling layer fills a portion of the trench, and a void is formed in the filling layer; and

a plug formed in the trench and at least partially extending into the void,

wherein a depth h of the plug extending into the void and a depth H of the void satisfy: ⅔H≤h≤¾H.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2021
From: LU, JINGWEN; HUNG, HAI-HAN; CHEN, MENG-CHENG
To: CHANGXIN MEMORY TECHNOLOGIES, INC.
Reel/Frame 057115/0492 →
Priority Claims (1)
CN 202010811395.9 · Aug 13, 2020 · national
Continuity (2)
Continuation PCTCN2021099856 · Jun 11, 2021
Related Publication 20220285204A1 · Sep 8, 2022