Semiconductor device

1. A semiconductor device comprising:

a substrate;

a first semiconductor region formed over the substrate;

a second semiconductor region formed over the substrate, and electrically connected to the first semiconductor region;

a third semiconductor region formed over the substrate, and positioned between the first semiconductor region and the second semiconductor region;

a fourth semiconductor region formed over the first semiconductor region;

a fifth semiconductor region formed over the second semiconductor region, and electrically connected to the fourth semiconductor region;

a sixth semiconductor region formed over the third semiconductor region, and positioned between the fourth semiconductor region and the fifth semiconductor region; and

wires formed between the first semiconductor region and the second semiconductor region, and between the fourth semiconductor region and the fifth semiconductor region, to cover the third semiconductor region and the sixth semiconductor region, the wires including conductors.

2. The semiconductor device as claimed in claim 1 , wherein the wires extend in a direction perpendicular to a direction in plan view, in which the first semiconductor region and the second semiconductor region are arranged.

3. The semiconductor device as claimed in claim 1 , further comprising:

a first power line to which the first semiconductor region and the second semiconductor region are electrically connected; and

a second power line to which the fourth semiconductor region and the fifth semiconductor region are electrically connected,

wherein the first semiconductor region and the second semiconductor region have a first conductivity type, and

wherein the fourth semiconductor region and the fifth semiconductor region have a second conductivity type different from the first conductivity type.

4. The semiconductor device as claimed in claim 3 , wherein in a case where a ground potential is supplied to the first power line and a power supply potential higher than the ground potential is supplied to the second power line, the first conductivity type is an N type, and the second conductivity type is a P type, and

wherein in a case where a ground potential is supplied to the second power line and a power supply potential higher than the ground potential is supplied to the first power line, the second conductivity type is an N type, and the first conductivity type is a P type.

5. The semiconductor device as claimed in claim 3 , wherein in a case where a ground potential is supplied to the first power line and a power supply potential higher than the ground potential is supplied to the second power line, the first conductivity type is a P type, and the second conductivity type is an N type, and

wherein in a case where a ground potential is supplied to the second power line and a power supply potential higher than the ground potential is supplied to the first power line, the second conductivity type is a P type, and the first conductivity type is an N type.

6. The semiconductor device as claimed in claim 3 , wherein the first power line and the second power line are formed in the substrate.

7. The semiconductor device as claimed in claim 3 , further comprising:

a first local wire electrically connecting the first power line and the first semiconductor region;

a second local wire electrically connecting the first power line and the second semiconductor region;

a third local wire electrically connecting the second power line and the fourth semiconductor region; and

a fourth local wire electrically connecting the second power line and the fifth semiconductor region.

8. The semiconductor device as claimed in claim 1 , wherein the wires are electrically connected to the first semiconductor region, the second semiconductor region, the fourth semiconductor region, and the fifth semiconductor region.

9. The semiconductor device as claimed in claim 8 , further comprising:

a first inverter electrically connected to one end of the wires; and

a second inverter electrically connected to another end of the wire.

10. The semiconductor device as claimed in claim 1 , further comprising:

a plurality of basic structures each including the first semiconductor region, the second semiconductor region, the third semiconductor region, the fourth semiconductor region, the fifth semiconductor region, the sixth semiconductor region, and the conductors,

wherein the plurality of basic structures are arranged side by side in a direction perpendicular to a direction in which the wires extend in plan view, and

wherein the wires are electrically connected in series between adjacent basic structures among the plurality of basic structures.

11. The semiconductor device as claimed in claim 1 , wherein the first semiconductor region, the second semiconductor region, and the third semiconductor region are formed in a fin formed over the substrate, and

wherein the fourth semiconductor region, the fifth semiconductor region, and the sixth semiconductor region are formed in nanowires formed above the fin.

12. A semiconductor device comprising:

a substrate;

a first semiconductor region and a second semiconductor region formed over the substrate;

a third semiconductor region formed over the first semiconductor region;

a fourth semiconductor region formed over the second semiconductor region; and

wires formed between the first semiconductor region and the second semiconductor region, and between the third semiconductor region and the fourth semiconductor region, the wires including conductors,

wherein the first semiconductor region, the second semiconductor region, the third semiconductor region, and the fourth semiconductor region are electrically floating.

13. The semiconductor device as claimed in claim 12 , wherein a current flows in the wires in a direction perpendicular to a direction in which the first semiconductor region and the second semiconductor region are arranged.

14. The semiconductor device as claimed in claim 12 , further comprising:

a plurality of basic structures each including the first semiconductor region, the second semiconductor region, the third semiconductor region, the fourth semiconductor region, and the conductors,

wherein the plurality of basic structures are arranged side by side in a direction perpendicular to a direction in which the conductors extend, and

wherein the conductors are electrically connected in series between adjacent basic structures among the plurality of basic structures.

15. The semiconductor device as claimed in claim 12 , wherein the first semiconductor region and the second semiconductor region are formed in a fin formed over the substrate, and

wherein the third semiconductor region and the fourth semiconductor region are formed in nanowires formed above the fin.