Method for ablating or roughening wafer surfaces
The present invention provides a simple method for ablating a protective thin film on a bulk surface and roughening the underlying bulk. In an embodiment, silicon nitride thin films, which are useful as etch-stop masks in micro- and nano-fabrication, is removed from a silicon wafer's surface using a hand-held “flameless” Tesla-coil lighter. Vias created by a spatially localized electron beam from the lighter allow a practitioner to perform micro- and nano-fabrication without the conventional steps of needing a photoresist and photolithography. Patterning could be achieved with a hard mask or rastering of the spatially confined discharge, offering—with low barriers to rapid use—particular capabilities that might otherwise be out of reach to researchers without access to conventional, instrumentation-intensive micro- and nano-fabrication workflows.
1. A method for removing portions of a thin film of an electric insulator from a surface of an underlying substrate and roughening the underlying substrate, the method comprising the steps of:
(a) placing a substrate, coated with a thin film comprising an electric insulator on at least one of the substrate's surfaces, in between two electrodes that are each electrically connected to a plasma generator; and
(b) activating the plasma generator to discharge a plasma-containing electron beam or arc upon the thin film, thereby removing portions of the thin film from the entrance side and roughening the underlying substrate by the beam or arc;
provided that no liquid solution is used on the thin film before or during the above two steps.
2. The method of claim 1 , wherein the plasma generator comprises a Tesla coil device.
3. The method of claim 2 , wherein Tesla coil device comprises a lighter comprising a spark gap where an electric arc is formed upon activation.
4. The method of claim 1 , wherein the thin film comprises silicon nitride.
5. The method of claim 4 , wherein the silicon nitride is silicon rich.
6. The method of claim 1 , wherein the substrate comprises a semiconductor or an insulator.
7. The method of claim 1 , wherein the substrate comprises silicon.
8. The method of claim 1 , further comprising using a pattern guide to assist in effecting a pattern of damage on the thin film.
9. The method of claim 8 , wherein the pattern guide is placed adjacent the thin film before step (b).
10. The method of claim 9 , wherein the pattern guide comprises an electrically conducting material.
11. The method of claim 10 , wherein the pattern guide comprises a metal.
12. The method of claim 9 , wherein the pattern guide is selected from the group consisting of an electric insulator formed with an opening for guiding the electron beam or arc, a magnetic or electrostatic deflection plate, a magnetic lens and an electrostatic lens.
13. The method of claim 8 , wherein the pattern guide does not contact the thin film.
14. The method of claim 8 , wherein the pattern guide comprises a pantograph.
15. The method of claim 1 , further comprising placing a grounding plate adjacent an opposing side of the entrance side, the grounding plate electrically connected to a ground.
16. The method of claim 1 , further comprising contacting the entrance side with an etching chemical subsequent to step (b).
17. The method of claim 1 , further comprising coating the entrance side with a SERS-capable metal subsequent to step (b).
18. A method for providing a substrate that can conduct Surface-Enhanced Raman Spectroscopy (SERS) thereon, the method comprising the steps of:
(a) placing a substrate in between two electrodes that are each electrically connected to a plasma generator;
(b) activating the plasma generator to discharge a plasma-containing electron beam or arc upon the substrate, thereby removing portions of substrate from the entrance side by the beam or arc; and
(c) subsequently coating the entrance side with a SERS-capable metal.
19. The method of claim 18 , further comprising, between steps (b) and (c), a step of contacting the entrance side with an etching chemical.
20. The method of claim 18 , wherein the SERS-capable metal is selected from the group consisting of gold, silver, copper, platinum, titanium, chromium, and combinations thereof.
21. The method of claim 18 wherein the substrate comprises silicon.
22. A method for fabricating a microfluidic channel on a substrate coated with a thin film barrier, the method comprising the steps of:
(a) placing a substrate, coated with a thin film comprising a barrier on at least one of the substrate's surfaces, in between two electrodes that are each electrically connected to a plasma generator;
(b) activating the plasma generator to discharge a plasma-containing electron beam or arc upon the thin film, thereby removing portions of the thin film barrier in the form of a preliminary channel from the entrance side by the beam or arc; and
(c) subsequently contacting the entrance side with an etching chemical to deepen the preliminary channel into desired channel dimension.
23. The method of claim 22 , further comprising a step of placing a pattern guide, comprising an electric insulator and formed with an opening, adjacent the thin film before step (b) to guide the electron beam or arc.