Gate oxide structures in semiconductor devices
A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The method includes forming first and second nanostructured channel regions on first and second fin structures, forming first and second oxide layers with first and second thicknesses, forming a dielectric layer with first and second layer portions on the first and second oxide layers, forming first and second capping layers with first and second oxygen diffusivities on the first and second layer portions, growing the first and second oxide layers to have third and fourth thicknesses, and forming a gate metal fill layer over the dielectric layer. The first and second thicknesses are substantially equal to each other and the first and second oxide layers surround the first and second nanostructured channel regions. The second oxygen diffusivity is higher than the first oxygen diffusivity. The fourth thickness is greater than the third thickness.
1. A method, comprising:
forming first and second nanostructured layers on a substrate;
performing a first oxidation process to form first and second oxide layers of substantially equal thicknesses on the first and second nanostructured layers, respectively;
forming a dielectric layer with first and second dielectric portions on the first and second oxide layers, respectively;
forming first and second capping layers with different thicknesses on the first and second dielectric portions, respectively;
performing a second oxidation process on the first and second capping layers to grow the second oxide layer to a thicknesses greater than a thickness of the first oxide layer; and
forming a gate metal fill layer on the dielectric layer.
2. The method of claim 1 , further comprising:
forming a first interfacial layer between the first capping layer and the first dielectric portion; and
forming a second interfacial layer between the second capping layer and the second dielectric portion.
3. The method of claim 1 , further comprising:
forming a third oxide layer comprising a metal of the first capping layer between the first capping layer and the first dielectric portion; and
forming a fourth oxide layer comprising a metal of the second capping layer between the second capping layer and the second dielectric portion.
4. The method of claim 1 , further comprising:
forming a first oxynitride layer comprising a metal of the first capping layer between the first capping layer and the first dielectric portion; and
forming a second oxynitride layer comprising a metal of the second capping layer between the second capping layer and the second dielectric portion.
5. The method of claim 1 , further comprising:
forming a first oxynitride layer with a first oxygen diffusivity between the first capping layer and the first dielectric portion; and
forming a second oxynitride layer with a second oxygen diffusivity between the second capping layer and the second dielectric portion,
wherein the second oxygen diffusivity is higher than the first oxygen diffusivity.
6. The method of claim 1 , wherein performing the first oxidation process comprises oxidizing exposed surfaces of the first and second nanostructured layers at substantially equal oxidation rates.
7. The method of claim 1 , wherein performing the second oxidation process comprises oxidizing the first and second nanostructured layers through the first and second capping layers at different oxidation rates.
8. The method of claim 1 , wherein forming the first and second capping layers comprises depositing first and second metal nitride layers of different thicknesses.
9. The method of claim 1 , wherein forming the first and second capping layers comprises depositing first and second titanium nitride or tantalum nitride layers of different thicknesses.
10. The method of claim 1 , wherein performing the second oxidation process comprises oxidizing the first and second nanostructured layers at an oxidation temperature higher than an oxidation temperature of the first oxidation process.
11. A method, comprising:
forming first and second epitaxial layers on a substrate;
forming a first gate structure with a first gate oxide structure on the first epitaxial layer; and
forming a second gate structure with a second gate oxide structure on the second epitaxial layer,
wherein forming the first and second gate oxide structures comprises:
forming first and second oxide layers of substantially equal thicknesses on the first and second epitaxial layers, respectively,
forming first and second nitride layers of different materials on the first and second oxide layers, respectively,
growing the first and second oxide layers to form modified first and second oxide layers with thicknesses different from each other,
removing the first and second nitride layers; and
forming a high-k dielectric layer on the modified first and second oxide layers.
12. The method of claim 11 , wherein forming the first and second gate oxide structures further comprises forming third and fourth oxide layers with oxygen diffusivities different from each other.
13. The method of claim 11 , wherein forming the first and second oxide layers of substantially equal thicknesses comprises oxidizing surfaces of the first and second epitaxial layers at substantially equal oxidation rates.
14. The method of claim 11 , wherein growing the first and second oxide layers comprises oxidizing the first and second epitaxial layers at different oxidation rates.
15. The method of claim 11 , wherein forming the first and second oxide layers comprises performing a first oxidation process at a first oxidation temperature, and
wherein growing the first and second oxide layers comprises performing a second oxidation process at a second oxidation temperature higher than the first oxidation temperature.
16. The method of claim 11 , wherein the removing the first and second nitride layers comprises etching the first and second nitride layers with an atomic layer etch process.
17. A semiconductor device, comprising:
a substrate;
first and second epitaxial layers disposed on the substrate;
first and second gate oxide structures disposed on the first and second epitaxial layers, respectively, wherein the first and second gate oxide structures comprise:
first and second oxide layers of different thicknesses disposed on the first and second epitaxial layers, respectively,
first and second dielectric layers disposed on the first and second oxide layers, respectively, and
third and fourth oxide layers of different materials with thicknesses that are substantially equal to each other disposed on the first and second dielectric layers, respectively; and
first and second gate metal fill layers disposed on the first and second gate oxide structures, respectively.
18. The semiconductor device of claim 17 , wherein the third oxide layer comprises an oxide of the first dielectric layer, and
wherein the fourth oxide layer comprises an oxide of the second dielectric layer.
19. The semiconductor device of claim 17 , wherein the first and second epitaxial layers comprises thicknesses different from each other.
20. The semiconductor device of claim 17 , wherein the first and second dielectric layers comprise dopants of rare earth metals.