IP Library › Granted Patent US 11,961,979
Granted Patent B2
US 11,961,979 · App. 16/973,666 · Granted Apr 16, 2024

Semiconductor device

Inventors: Takayuki Ikeda (Kanagawa, JP); Munehiro Kozuma (Kanagawa, JP); Takanori Matsuzaki (Kanagawa, JP); Ryota Tajima (Kanagawa, JP); Shunpei Yamazaki (Tokyo, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01M10/443H01L27/1207H01L27/1225H01L27/124H01L27/1255H01L29/24H01L29/78648H01L29/7869H01M10/48H01M10/486H02J7/0047H10B99/00
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,961,979
App. No.
16/973,666
Granted
Apr 16, 2024
Kind
B2
Abstract

A semiconductor device capable of charging that is less likely to cause deterioration of a power storage device is provided. The amount of a charging current is adjusted in accordance with the ambient temperature. Charging under low-temperature environments is performed with a reduced charging current. When the ambient temperature is too low or too high, the charging is stopped. Measurement of the ambient temperature is performed with a memory element using an oxide semiconductor. The use of a memory element using an oxide semiconductor enables measurement of the ambient temperature and retention of the temperature information to be performed at the same time.

Claims (16)

1. A semiconductor device comprising a first memory element, a second memory element, a comparison circuit, and a current adjustment circuit,

wherein the first memory element is configured to retain reference temperature information,

wherein the second memory element comprises a capacitor and a first transistor comprising an oxide semiconductor in a first semiconductor layer,

wherein the second memory element is configured to measure ambient temperature, and to retain the ambient temperature as ambient temperature information between one electrode of the capacitor and one of a source electrode and a drain electrode of the first transistor due to a resistance change of the oxide semiconductor,

wherein the comparison circuit is configured to determine an operation of the current adjustment circuit by comparing the reference temperature information and the ambient temperature information, and

wherein the current adjustment circuit is configured to supply a current to a secondary battery.

2. The semiconductor device according to claim 1 , further comprising a plurality of the first memory elements,

wherein each of the first memory elements is configured to retain reference temperature information different from each other.

3. The semiconductor device according to claim 1 ,

wherein the first semiconductor layer comprises one or both of indium and zinc.

4. The semiconductor device according to claim 1 ,

wherein the first memory element comprises a second transistor comprising an oxide semiconductor in a second semiconductor layer.

5. The semiconductor device according to claim 4 ,

wherein the second semiconductor layer comprises one or both of indium and zinc.

6. The semiconductor device according to claim 1 ,

wherein the secondary battery is a lithium-ion secondary battery.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2020
From: IKEDA, TAKAYUKI; KOZUMA, MUNEHIRO; MATSUZAKI, TAKANORI; TAJIMA, RYOTA; YAMAZAKI, SHUNPEI
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 054597/0540 →
Priority Claims (1)
JP 2018-130780 · Jul 10, 2018 · national
Continuity (1)
Related Publication 20210249703A1 · Aug 12, 2021