IP Library › Granted Patent US 11,972,900
Granted Patent B2
US 11,972,900 · App. 17/668,411 · Granted Apr 30, 2024

Multilayer ceramic capacitor

Inventor: Yoshiyuki Abe (Nagaokakyo, JP)
Assignee: MURATA MANUFACTURING CO., LTD.
H01G2/00H01G4/2325H01G4/248H01G4/30H01G4/008H01G4/1227H01G4/1245
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Quick Facts
Patent No.
US 11,972,900
App. No.
17/668,411
Granted
Apr 30, 2024
Kind
B2
Abstract

A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, first and second main surfaces opposing each other in a lamination direction, first and second end surfaces opposing each other in a length direction which intersects the lamination direction, and first and second side surfaces opposing each other in a width direction which intersects the lamination direction and the length direction, and external electrodes on the first and second end surfaces, and each electrically connected to the internal electrode layers, wherein the multilayer body includes a slit in at least one of the first side surface, the second side surface, and the second main surface defining and functioning as a board-mounting surface.

Claims (23)

1. A multilayer ceramic capacitor comprising:

a multilayer body including a plurality of dielectric layers and a plurality of internal electrode layers alternately laminated therein, a first main surface and a second main surface opposing each other in a lamination direction, a first end surface and a second end surface opposing each other in a length direction which intersects the lamination direction, and a first side surface and a second side surface opposing each other in a width direction which intersects the lamination direction and the length direction; and

external electrodes respectively on the first end surface and the second end surface of the multilayer body, and each electrically connected to the internal electrode layers; wherein

the plurality of internal electrode layers include first internal electrode layers each extending toward the first end surface and second internal electrode layers each extending toward the second end surface;

the first internal electrode layer closest to the first main surface and the second internal electrode layer closest to the first main surface are opposed to each other in the lamination direction;

the second internal electrode layer closest to the second main surface and the first internal electrode layer closest to the second main surface are opposed to each other in the lamination direction;

there are no other electrode layers between the second main surface and the first and second internal electrode layers closest to the second main surface in the lamination direction;

the plurality of internal electrode layers do not oppose each other in the length direction; and

the multilayer body includes a slit in at least one of the first side surface, the second side surface, and the second main surface defining and functioning as a board-mounting surface.

2. The multilayer ceramic capacitor according to claim 1 , wherein the slit extends over entire dimensions or substantially entire dimensions in the lamination direction of the first side surface and the second side surface.

3. The multilayer ceramic capacitor according to claim 1 , wherein the slit is provided at a portion on the first side surface and at a portion on the second side surface in a vicinity of the second main surface in the lamination direction.

4. The multilayer ceramic capacitor according to claim 1 , wherein the slit is provided over an entire or substantially an entire length in the width direction of the second main surface.

5. The multilayer ceramic capacitor according to claim 1 , wherein the slit is provided at a portion in the width direction of the second main surface.

6. The multilayer ceramic capacitor according to claim 1 , wherein a deviation in the lamination direction between end portions of the internal electrode layers in a vicinity of the first side surface and the second side surface is about 0.5 μm or less.

7. The multilayer ceramic capacitor according to claim 1 , wherein each of the plurality of dielectric layers is made of a ceramic material including Ba and Ti.

8. The multilayer ceramic capacitor according to claim 1 , wherein each of the plurality of internal electrode layers includes Ni.

9. The multilayer ceramic capacitor according to claim 1 , wherein each of the plurality of dielectric layers is made of a ceramic material including Ca, Zr, and Ti.

10. The multilayer ceramic capacitor according to claim 1 , wherein each of the plurality of internal electrode layers includes Cu.

11. The multilayer ceramic capacitor according to claim 1 , wherein each of the external electrodes includes a sintered Cu paste including glass including Ba and silica.

12. The multilayer ceramic capacitor according to claim 1 , wherein the slit has a triangular or substantially triangular cross-sectional shape.

13. The multilayer ceramic capacitor according to claim 1 , wherein the slit has a semicircular or substantially semicircular cross-sectional shape.

14. The multilayer ceramic capacitor according to claim 1 , wherein the slit has a semi-elliptical or substantially semi-elliptical cross-sectional shape.

15. The multilayer ceramic capacitor according to claim 1 , wherein the slit has a rectangular or substantially rectangular cross-sectional shape.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2022
From: ABE, YOSHIYUKI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 058967/0606 →
Priority Claims (1)
JP 2021-027237 · Feb 24, 2021 · national
Continuity (1)
Related Publication 20220270820A1 · Aug 25, 2022