Method of manufacturing a semiconductor device and a semiconductor device
In method of manufacturing a semiconductor device, a source/drain epitaxial layer is formed, one or more dielectric layers are formed over the source/drain epitaxial layer, an opening is formed in the one or more dielectric layers to expose the source/drain epitaxial layer, a first silicide layer is formed on the exposed source/drain epitaxial layer, a second silicide layer different from the first silicide layer is formed on the first silicide layer, and a source/drain contact is formed over the second silicide layer.
1. A method of manufacturing a semiconductor device, comprising:
forming a source/drain epitaxial layer;
forming one or more dielectric layers over the source/drain epitaxial layer;
forming an opening in the one or more dielectric layers to expose the source/drain epitaxial layer;
forming a first silicide layer on the exposed source/drain epitaxial layer;
forming a second silicide layer different from the first silicide layer on the first silicide layer;
forming a source/drain contact over the second silicide layer; and
forming an interfacial silicide layer between the first silicide layer and the source/drain epitaxial layer.
2. The method of claim 1 , wherein the first silicide layer is a nickel silicide layer and the second silicide layer is a titanium-nickel silicide layer.
3. The method of claim 2 , wherein a nickel concentration in the first silicide layer is in a range from 20 atomic % to 60 atomic %.
4. The method of claim 2 , wherein a nickel concentration in the second silicide layer is greater than a titanium concentration in the second silicide layer.
5. The method of claim 4 , wherein a ratio Ni/Ti of the nickel concentration to the titanium concentration in the second silicide layer is in a range from 1.01 to 5.
6. The method of claim 2 , wherein a thickness of the first silicide layer is greater than a thickness of the second silicide layer.
7. The method of claim 1 , wherein:
after the opening is formed, an upper surface of the exposed source/drain epitaxial layer has a concave shape, and
an upper surface of each of the first and second silicide layers has a concave shape.
8. The method of claim 1 , wherein the interfacial silicide layer is a layer of nickel silicide including P.
9. A method of manufacturing a semiconductor device, comprising:
forming a source/drain epitaxial layer;
forming one or more dielectric layers over the source/drain epitaxial layer;
forming an opening in the one or more dielectric layers to expose the source/drain epitaxial layer;
forming a dielectric cover layer on the exposed source/drain epitaxial layer and a sidewall of the opening of the one or more dielectric layers;
selectively removing a part of the dielectric cover layer formed on the exposed source/drain epitaxial layer;
forming a first silicide layer on the exposed source/drain epitaxial layer;
forming a second silicide layer different from the first silicide layer on the first silicide layer; and
forming a source/drain contact over the second silicide layer.
10. The method of claim 9 , wherein the dielectric cover layer includes silicon nitride.
11. The method of claim 10 , wherein a thickness of the dielectric cover layer is in a range from 1 nm to 10 nm.
12. The method of claim 11 , wherein the dielectric cover layer is formed by atomic layer deposition.
13. The method of claim 9 , further comprising forming a barrier layer before the source/drain contact is formed,
wherein part of the dielectric cover layer not removed by the selectively removing a part of the dielectric cover layer is disposed between the sidewall of the opening and the barrier layer.
14. The method of claim 13 wherein the barrier layer includes titanium nitride and the source/drain contact includes cobalt.
15. The method of claim 13 , wherein after the barrier layer is formed, the dielectric cover layer contacts an edge of at least one of the first silicide layer or the second silicide layer.
16. A method of manufacturing a semiconductor device, comprising:
forming a first gate structure and a second gate structure, each of which include a gate dielectric layer, a gate electrode layer, a sidewall spacer layer, a cap insulating layer disposed on the gate electrode layer and the sidewall spacer layer;
forming a source/drain epitaxial layer;
forming one or more dielectric layers over the source/drain epitaxial layer;
forming an opening in the one or more dielectric layers to expose the source/drain epitaxial layer;
forming a dielectric cover layer on the exposed source/drain epitaxial layer and a sidewall of the opening of the one or more dielectric layers;
selectively removing a part of the dielectric cover layer formed on the exposed source/drain epitaxial layer;
forming a first silicide layer on the exposed source/drain epitaxial layer;
forming a second silicide layer different from the first silicide layer on the first silicide layer; and
forming a source/drain contact over the second silicide layer,
wherein an upper surface of the cap insulating layer includes a recess and the dielectric cover layer fills the recess.
17. The method of claim 16 , wherein the first silicide layer is a nickel silicide layer and the second silicide layer is a titanium-nickel silicide layer.
18. The method of claim 17 , wherein a thickness of the first silicide layer at a center between the first and second gate structures is greater than a thickness of the second silicide layer at the center.
19. The method of claim 18 , wherein the thickness of the first silicide layer at the center is in a range from 5 nm to 15 nm.
20. The method of claim 18 , wherein the thickness of the second silicide layer at the center is in a range from 2 nm to 5 nm.