Memory management method, memory storage device and memory control circuit unit

1. A memory management method, adapted to a memory storage device comprising a memory control circuit unit and a rewritable non-volatile memory module, the memory management method comprising:

determining a first operation event among a plurality of operation events executed by the memory control circuit unit in a background mode as a successfully executed operation event if the first operation event is completed before the memory storage device leaves the background mode, wherein the operation events comprise at least one of a table read event, a data extraction event and a data write event performed to the rewritable non-volatile memory module;

determining a second operation event among the operation events executed by the memory control circuit unit in the background mode as a failed executed operation event if the second operation event is not completed before the memory storage device leaves the background mode;

obtaining a first total number of the successfully executed operation event, wherein in the background mode, the memory storage device executes a background operation corresponding to the operation events;

obtaining a second total number of the failed executed operation event;

obtaining a success rate calculated based on the first total number and the second total number;

adjusting a threshold value according to the success rate reflecting a proportion of the successfully executed operation events among all of the operation events performed by the memory control circuit unit in the background mode, and a power consumption of the memory storage device in the background mode is lower than a power consumption of the memory storage device in a normal mode; and

counting time information in the normal mode, and instructing the memory storage device to enter the background mode to execute the background operation in response to the time information satisfying the threshold value,

wherein adjusting the threshold value according to the success rate comprises:

increasing the threshold value by a first adjustment value in response to the success rate being smaller than a first evaluation value; and

decreasing the threshold value by a second adjustment value in response to the success rate being greater than a second evaluation value, wherein the second evaluation value is greater than the first evaluation value.

2. The memory management method as claimed in claim 1 , further comprising:

not to adjust the threshold value if the success rate is complied with a third condition.

3. The memory management method as claimed in claim 1 , wherein the time information reflects an idle time of the memory storage device in the normal mode.

4. A memory storage device, comprising:

a connection interface unit, coupled to a host system;

a rewritable non-volatile memory module; and

a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module,

wherein the memory control circuit unit is configured to determine a first operation event among a plurality of operation events executed by the memory control circuit unit in a background mode as a successfully executed operation event if the first operation event is completed before the memory storage device leaves the background mode, wherein the operation events comprise at least one of a table read event, a data extraction event and a data write event performed to the rewritable non-volatile memory module,

the memory control circuit unit is further configured to determine a second operation event among the operation events executed by the memory control circuit unit in the background mode as a failed executed operation event if the second operation event is not completed before the memory storage device leaves the background mode,

the memory control circuit unit is further configured to obtain a first total number of the successfully executed operation event, obtain a second total number of the failed executed operation event, and obtain a success rate calculated based on the first total number and the second total number,

wherein in the background mode, the memory storage device executes a background operation corresponding to the operation events,

the memory control circuit unit is further configured to adjust a threshold value according to the success rate reflecting a proportion of the successfully executed operation events among all of the operation events performed by the memory control circuit unit in the background mode, and a power consumption of the memory storage device in the background mode is lower than a power consumption of the memory storage device in a normal mode, and

the memory control circuit unit is further configured to count time information in the normal mode, and instruct the memory storage device to enter the background mode to execute the background operation in response to the time information satisfying the threshold value,

wherein the operation that the memory control circuit unit adjusts the threshold value according to the success rate comprises:

increasing the threshold value by a first adjustment value in response to the success rate being smaller than a first evaluation value; and

decreasing the threshold value by a second adjustment value in response to the success rate being greater than a second evaluation value, wherein the second evaluation value is greater than the first evaluation value.

5. The memory storage device as claimed in claim 4 , wherein the memory control circuit unit does not adjust the threshold value if the success rate is complied with a third condition.

6. The memory storage device as claimed in claim 4 , wherein the time information reflects an idle time of the memory storage device in the normal mode.

7. A memory control circuit unit, adapted to control a memory storage device comprising a rewritable non-volatile memory module, the memory control circuit unit comprises:

a host interface, configured to be coupled to a host system;

a memory interface, configured to be coupled to the rewritable non-volatile memory module; and

a memory management circuit, coupled to the host interface and the memory interface,

wherein the memory management circuit is configured to determine a first operation event among a plurality of operation events executed by the memory control circuit unit in a background mode as a successfully executed operation event if the first operation event is completed before the memory storage device leaves the background mode, wherein the operation events comprise at least one of a table read event, a data extraction event and a data write event performed to the rewritable non-volatile memory module,

the memory management circuit is further configured to determine a second operation event among the operation events executed by the memory control circuit unit in the background mode as a failed executed operation event if the second operation event is not completed before the memory storage device leaves the background mode,

the memory management circuit is further configured to obtain a first total number of the successfully executed operation event, obtain a second total number of the failed executed operation event, and obtain a success rate calculated based on the first total number and the second total number,

wherein in the background mode, the memory storage device executes a background operation corresponding to the operation events,

the memory management circuit is further configured to adjust a threshold value according to the success rate reflecting a proportion of the successfully executed operation events among all of the operation events performed by the memory control circuit unit in the background mode, and a power consumption of the memory storage device in the background mode is lower than a power consumption of the memory storage device in a normal mode,

the memory management circuit is further configured to count time information in the normal mode, and instruct the memory storage device to enter the background mode to execute the background operation in response to the time information satisfying the threshold value,

wherein the operation that the memory management circuit adjusts the threshold value according to the success rate comprises:

increasing the threshold value by a first adjustment value in response to the success rate being smaller than a first evaluation value; and

decreasing the threshold value by a second adjustment value in response to the success rate being greater than a second evaluation value, wherein the second evaluation value is greater than the first evaluation value.

8. The memory control circuit unit as claimed in claim 7 , wherein the memory management circuit does not adjust the threshold value if the success rate is complied with a third condition.

9. The memory control circuit unit as claimed in claim 7 , wherein the time information reflects an idle time of the memory storage device in the normal mode.