Systems and methods for fault-resilient system management random access memory

1. An information handling system comprising:

a processor;

a memory communicatively coupled to the processor; and

a basic input/output system communicatively coupled to the processor and comprising a program of executable instructions configured to:

maintain a System Management Random Access Memory (SMRAM) test flag indicative of a requirement to test a designated region of memory configured as an SMRAM for use in a System Management Mode (SMM) mode of operation; and

during a Pre-Extensible Firmware Interface Initialization (PEI) phase of the basic input/output system, responsive to detecting that the SMRAM test flag is set:

test the designated region and responsive to detecting a memory fault:

map out the designated region and designate an additional region of the memory as a designated region for SMRAM; and

repeat testing of additional designated regions, mapping out of failed additional designated regions, and designating new additional regions of the memory until a designated region passes testing without memory fault; and

in response to detecting passage of testing without memory fault of a designated region comprising either of the first designated region or an additional region of the memory, configure the designated region for use as the SMRAM for the information handling system; and

responsive to a system management interrupt (SMI), configure the information handling system to enter the SMM, in which the SMRAM is configured as a separate address space dedicated for executing SMM code.

2. The information handling system of claim 1 , wherein the basic input/output system is further configured to, during the PEI phase:

in response to detecting a memory fault in any of the first designated region and any additional region of the memory, increment a failure counter; and

in response to the failure counter reaching a threshold level, cause delivery of a replacement memory module for the information handling system.

3. The information handling system of claim 1 , wherein the flag is set in response to a memory diagnostics test being executed during the previous boot session.

4. The information handling system of claim 1 , wherein the flag is set in response to execution of an SMI exception handler occurring during the previous hoot session.

5. A method comprising;

maintaining a System Management Random Access Memory (SMRAM) test flag indicative of a requirement to test a designated region of memory configured as an SMRAM for use in a System Management Mode (SMM) mode of operation; and

during a Pre-Extensible Firmware Interface Initialization (PEI) phase of a basic input/output system of an information handling system, responsive to detecting that the SMRAM test flag is set:

testing the designated region responsive to detecting a memory fault:

mapping out the designated region and designating an additional region of the memory as a designated region for SMRAM; and

repeating testing of additional designated regions, mapping out of tidied additional designated regions, and designating new additional regions of the memory until a designated region passes testing without memory fault; and

in response to detecting passage of testing without memory fault of a designated region comprising either of the first designated region or an additional region of the memory, configuring the designated region for use as the SMRAM for the information handling system; and

responsive to a system management interrupt (SMI), configure the information handling system to enter the SMM, in which the SMRAM is configured as a separate address space dedicated for executing SMM code.

6. The method of claim 5 , further comprising, during the PEI phase:

in response to detecting a memory fault in any of the first designated region and any additional region of the memory, incrementing a failure counter; and

in response to the failure counter reaching a threshold level, causing delivery of a replacement memory module for the information handling system.

7. The method of claim 5 , wherein the flag is set in response to a memory diagnostics test being executed during the previous boot session.

8. The method of claim 5 , wherein the flag is set in response to execution of an SMI exception handier occurring during the previous boot session.

9. An article of manufacture comprising:

a non-transitory computer-readable medium; and

computer-executable instructions carried on the computer-readable medium, the instructions readable by a processor, the instructions, when read and executed, for causing the processor to:

maintain a System Management Random Access Memory (SMRAM) test flag indicative of a requirement to test a designated region of memory configured as an SMRAM for use in a System Management Mode (SMM) mode of operation; and

during a Pre-Extensible Firmware Interface Initialization (PEI) phase of a basic input/output system of an information handling system, responsive to detecting that the SMRAM test flag is set:

test the designated region and responsive to detecting a memory fault:

map out the designated region and designate an additional region of the memory as a designated region for SMRAM; and

repeat testing of additional designated regions, mapping out of failed additional designated regions, and designating new additional regions of the memory until a designated region passes testing without memory fault; and

in response to detecting passage of testing without memory fault of a designated region comprising either of the first designated region or an additional region of the memory, configuring the designated region for use as the SMRAM for the information handling system; and

responsive to a system management interrupt (SMI), configure the information handling system to enter the SMM, in which the SMRAM is configured as a separate address space dedicated for executing SMM code.

10. The article of claim 9 , the instructions for further causing the processor to, during the PEI phase:

in response to detecting a memory fault in any of the first designated region and any additional region of the memory, increment a failure cannier; and

in response to the failure counter reaching a threshold level, cause delivery of a replacement memory module for the information handling system.

11. The article of claim 9 , wherein the flag is set in response to a memory diagnostics test being executed during the previous boot session.

12. The article of claim 9 , wherein the flag is set in response to execution of an SMI exception handier occurring during the previous boot session.