IP Library › Granted Patent US 11,984,459
Granted Patent B2
US 11,984,459 · App. 16/980,095 · Granted May 14, 2024

Array substrate and OLED display panel

Inventors: Chao Liang (Hubei, CN); Liang Ma (Hubei, CN); Xuyang Liu (Hubei, CN)
Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
H01L27/1259H01L27/1218H01L27/1248H10K59/131H10K77/111H10K2102/311
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Quick Facts
Patent No.
US 11,984,459
App. No.
16/980,095
Granted
May 14, 2024
Kind
B2
Abstract

An array substrate and an OLED display panel are provided. The array substrate includes a base substrate, a first film layer set and a second film layer set. A bending area of the array substrate has a first trench throughout the first film layer set and a second trench throughout the second film layer set. The first film layer set close to the second film layer set has a blocking part having an etching opening corresponding to the first trench. The etching opening is throughout the blocking part. A bottom of the etching opening connects to a top of the first trench. A bottom of the second trench connects to a top of the blocking part.

Claims (53)

1. An array substrate, comprising:

a display area;

a bending area at a side of the display area;

a base substrate;

a first film layer set, positioned on the base substrate and comprising a buffer layer;

an active layer, positioned on the buffer layer;

a first gate insulating layer, covering the active layer;

a first gate electrode, positioned on the first gate insulating layer;

a second gate insulating layer, covering the first gate electrode;

a second gate electrode, positioned on the second gate insulating layer;

an interlayer dielectric layer, covering the second gate electrode;

a source/drain electrode, positioned on the interlayer dielectric layer; and

a planarization layer, covering the source/drain electrode; and

a second film layer set, positioned at one side of the first film layer set, which is comparatively far away from the base substrate, wherein the bending area has a first trench throughout the first film layer set and a second trench throughout the second film layer set; one side of the first film layer set close to the second film layer set has a blocking part; the blocking part has an etching opening corresponding to the first trench; the etching opening is throughout the blocking part; a bottom of the etching opening connects to a top of the first trench; a bottom of the second trench connects to a top of the blocking part; and an orthographic projection of the second trench on the base substrate covers an orthographic projection of the etching opening on the base substrate,

wherein the blocking part comprises:

a plurality of blocking blocks, positioned at a same layer as at least one of the active layer, the first gate electrode and the second gate electrode;

wherein the etching opening is throughout all the blocking blocks, and the blocking blocks extend along a first direction parallel to a length direction of the first trench,

wherein one end of the blocking blocks comparatively far away from the etching opening has a plurality of notches along a second direction, and the notches are distributed along the first direction.

2. The array substrate of claim 1 , wherein the blocking blocks and the active layer are manufactured in a same process if the blocking blocks and the active layer are in a same layer; the blocking blocks and the first gate electrode are manufactured in a same process if the blocking blocks and the first gate electrode are in a same layer; and the blocking blocks and the second gate electrode are manufactured in a same process if the blocking blocks and the second gate electrode are in a same layer.

3. The array substrate of claim 1 , wherein the blocking blocks comprises a plurality of blocking stripes distributed and equally-spaced along the first direction.

4. The array substrate of claim 1 , wherein the blocking part comprises a first blocking block and a second blocking block, the first blocking block is positioned in a same layer as at least one of the active layer, the first gate electrode, and the second gate electrode, and the second blocking block is positioned in a same layer as at least another one of the active layer, the first gate electrode, and the second gate electrode;

wherein the first blocking block comprises a plurality of first blocking stripes distributed and equally-spaced along the first direction, two adjacent first blocking stripes has a first gap in between; the second blocking block comprises a plurality of second blocking stripes distributed and equally-spaced along the first direction, two adjacent second blocking stripes has a second gap in between; an orthogonal projection of a first blocking strip on the base substrate cover an orthogonal projection of the second gap on the base substrate; and an orthogonal projection of a second blocking strip on the base substrate covers an orthogonal projection of the first gap on the base substrate.

5. The array substrate of claim 1 , wherein the first trench and the second trench are manufactured by a same process.

6. The array substrate of claim 1 , wherein the interlayer dielectric layer has a via throughout the interlayer dielectric layer and extending to the active layer; the source/drain electrode is filling up in the via and electrically connected to the active layer; and the via, the first trench and the second trench are manufactured through a same process.

7. An organic light emitting diode (OLED) display panel, comprising:

an array substrate, having a display area and a bending area at a side of the display area, the array substrate comprising:

a base substrate;

a first film layer set, positioned on the base substrate and comprising a buffer layer;

an active layer, positioned on the buffer layer;

a first gate insulating layer, covering the active layer;

a first gate electrode, positioned on the first gate insulating layer;

a second gate insulating layer, covering the first gate electrode;

a second gate electrode, positioned on the second gate insulating layer;

an interlayer dielectric layer, covering the second gate electrode;

a source/drain electrode, positioned on the interlayer dielectric layer; and

a planarization layer, covering the source/drain electrode; and

a second film layer set, positioned at one side of the first film layer set, which is comparatively far away from the base substrate, wherein the bending area has a first trench throughout the first film layer set and a second trench throughout the second film layer set; one side of the first film layer set close to the second film layer set has a blocking part; the blocking part has an etching opening corresponding to the first trench; the etching opening is throughout the blocking part; a bottom of the etching opening connects to a top of the first trench; a bottom of the second trench connects to a top of the blocking part; and an orthographic projection of the second trench on the base substrate covers an orthographic projection of the etching opening on the base substrate,

an anode metal layer and a pixel definition layer, positioned on the array substrate;

a light emitting material layer, positioned on the anode metal layer;

a supporting pillar, positioned on the pixel definition layer; and

a cathode layer, positioned on the pixel definition layer, the supporting pillar, and the light emitting material layer,

wherein the blocking part comprises:

a plurality of blocking blocks, positioned at a same layer as at least one of the active layer, the first gate electrode and the second gate electrode;

wherein the etching opening is throughout all the blocking blocks, and the blocking blocks extend along a first direction parallel to a length direction of the first trench,

wherein one end of the blocking blocks comparatively far away from the etching opening has a plurality of notches along a second direction, and the notches are distributed along the first direction.

8. The OLED display panel of claim 7 , wherein the blocking blocks and the active layer are manufactured in a same process if the blocking blocks and the active layer are in a same layer; the blocking blocks and the first gate electrode are manufactured in a same process if the blocking blocks and the first gate electrode are in a same layer; and the blocking blocks and the second gate electrode are manufactured in a same process if the blocking blocks and the second gate electrode are in a same layer.

9. The OLED display panel of claim 7 , wherein the blocking blocks comprises a plurality of blocking stripes distributed and equally-spaced along the first direction.

10. The OLED display panel of claim 7 , wherein the blocking part comprises a first blocking block and a second blocking block, the first blocking block is positioned in a same layer as at least one of the active layer, the first gate electrode, and the second gate electrode, and the second blocking block is positioned in a same layer as at least another one of the active layer, the first gate electrode, and the second gate electrode;

wherein the first blocking block comprises a plurality of first blocking stripes distributed and equally-spaced along the first direction, two adjacent first blocking stripes has a first gap in between; the second blocking block comprises a plurality of second blocking stripes distributed and equally-spaced along the first direction, two adjacent second blocking stripes has a second gap in between; an orthogonal projection of a first blocking strip on the base substrate cover an orthogonal projection of the second gap on the base substrate; and an orthogonal projection of a second blocking strip on the base substrate covers an orthogonal projection of the first gap on the base substrate.

11. The OLED display panel of claim 7 , wherein the first trench and the second trench are manufactured by a same process.

12. The OLED display panel of claim 7 , wherein the interlayer dielectric layer has a via throughout the interlayer dielectric layer and extending to the active layer; the source/drain electrode is filling up in the via and electrically connected to the active layer; and the via, the first trench and the second trench are manufactured through a same process.

13. The OLED display panel of claim 7 , wherein the first trench extends along its length direction to pass through a front side and a back side of the first film layer set; and the second trench extends along its length direction to pass through a front side and a back side of the second film layer set.

14. The OLED display panel of claim 7 , wherein the first trench and the second trench are connected to each other, and an orthogonal projection of a second trench on the base substrate covers an orthogonal projection of the first trench on the base substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2020
From: LIANG, CHAO
To: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Reel/Frame 053747/0568 →
Priority Claims (1)
CN 202010530758.1 · Jun 11, 2020 · national
Continuity (1)
Related Publication 20220246649A1 · Aug 4, 2022