Method of manufacturing a graphene-based biological field-effect transistor

1. A method of fabricating a biological field-effect transistor (BioFET), the method comprising:

preparing a carbonaceous dispersion by adding a three-dimensional (3D) graphene into a solvent;

depositing the carbonaceous dispersion onto a p-type silicon wafer;

spin-coating a positive photoresist over the carbonaceous dispersion by placing a photomask with an image of an array of graphene field effect transistors (FETs) over the p-type wafer and exposing the p-type wafer to ultraviolet (UV) light;

forming source and drain terminals on the p-type silicon wafer, the source and drain terminals in contact with the 3D graphene of the carbonaceous dispersion;

removing residual photoresist from the carbonaceous dispersion by placing the p-type silicon wafer in 1-methyl-2-pyrrolidone (NMP); and

biofunctionalizing the carbonaceous dispersion with a molecular recognition element configured to alter one or more electrical properties of the Bio-FET in response to exposure of the molecular recognition element to the analyte.

2. The method of claim 1 , wherein preparing the carbonaceous dispersion further comprises:

sonicating the carbonaceous dispersion for a defines time period.

3. The method of claim 1 , wherein preparing the carbonaceous dispersion further comprises:

discarding precipitates from the carbonaceous dispersion; and

retaining the 3D graphene in the solvent.

4. The method of claim 1 , further comprising:

cleaning the p-type silicon wafer by removing organic contaminants, oxide layers, and ionic contamination.

5. The method of claim 4 , further comprising:

creating a solution including deionized water, ammonium hydroxide, and hydrogen peroxide;

submerging the p-type silicon wafer into the solution for a first time period; and

washing the p-type silicon wafer with excess deionized water.

6. The method of claim 5 , further comprising:

placing the p-type silicon wafer onto a clean alumina device inside an oxidation furnace; and

performing a dry oxidation of the p-type silicon wafer using the oxidation furnace for a second time period.

7. The method of claim 1 , wherein obtaining the substrate further comprises:

depositing a thermal oxide onto the p-type silicon wafer.

8. The method of claim 7 , further comprising:

coating the p-type silicon wafer with the carbonaceous dispersion.

9. The method of claim 8 , further comprising:

applying a piranha solution including a 3:1 mixture of sulfuric acid (H 2 SO 4 ) and hydrogen peroxide (H 2 O 2 ) to remove any organic residue on exposed surfaces of the carbonaceous dispersion or the p-type silicon wafer.

10. The method of claim 9 , further comprising:

depositing a layer of 3-aminopropyltriethoxysilane (APTES) on the p-type silicon wafer; and

creating a plurality of APTES-activated surfaces on the p-type silicon wafer by removing excess APTES with water.

11. The method of claim 10 , further comprising:

creating a plurality of graphenated APTES-activated surfaces by spin-coating the three-dimensional graphene onto the plurality of APTES-activated surfaces;

washing the plurality of graphenated APTES-activated surfaces; and

annealing the plurality of graphenated APTES-activated surfaces.

12. The method of claim 1 , further comprising:

immersing the p-type wafer in a developer including tetramethylammonium hydroxide;

placing the p-type wafer into a plasma etcher;

exposing the p-type wafer to an oxygen plasma within the plasma etcher;

cleaning the p-type wafer in acetone and isopropanol; and

removing the carbonaceous dispersion from the p-type wafer except in areas defined by the array of graphene FET.

13. The method of claim 1 , wherein forming the source and drain terminals further comprises placing a photomask over the p-type wafer.

14. The method of claim 13 , further comprising:

depositing a chromium film onto the p-type wafer; and

depositing a gold film onto the chromium film.

15. The method of claim 14 , wherein depositing the chromium film further comprises:

generating a chromium vapor by heating one or more of a chromium rod or a plurality of chromium pellets in a vacuum chamber; and

dispersing the chromium vapor onto the p-type wafer.

16. The method of claim 14 , wherein depositing the gold film further comprises:

generating a gold vapor by heating one or more of a gold rod or a plurality of gold pellets in a vacuum chamber; and

dispersing the gold vapor onto the chromium film.

17. The method of claim 14 , further comprising:

immersing the p-type wafer in acetone; and

rinsing the p-type wafer with water.

18. The method of claim 14 , further comprising disposing a shadow mask on the p-type wafer, wherein the shadow mask at least partially defines the source drain terminals.

19. The method of claim 1 , further comprising:

fabricating a platinum central liquid gate electrode.

20. The method of claim 1 , wherein biofunctionalizing the carbonaceous dispersion further comprises:

performing reductive covalent functionalization.

21. The method of claim 1 , wherein biofunctionalizing the carbonaceous dispersion further comprises:

stacking biomolecules on exposed surfaces of the 3D graphene.

22. The method of claim 17 , wherein performing reductive covalent functionalization further comprises:

yielding carboxylic acids on exposed surfaces of the carbonaceous dispersion; and reacting carboxylic acids with amines from bioreceptors in the carbonaceous dispersion using EDC (1-ethyl-3-(3-dimethylaminopropyl)carbodiimide hydrochloride) and sulfo-NHS (N-hydroxysulfosuccinimide).