IP Library Granted Patent US 11,990,376
Granted Patent B2
US 11,990,376 · App. 17/816,039 · Granted May 21, 2024

Selective dual silicide formation

Inventors: Peng-Wei Chu (Hsinchu, TW); Sung-Li Wang (Hsinchu County, TW); Yasutoshi Okuno (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L21/823814H01L21/28518H01L27/0924
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Quick Facts
Patent No.
US 11,990,376
App. No.
17/816,039
Granted
May 21, 2024
Kind
B2
Abstract

A semiconductor device and a method of making the same are provided. A method according to the present disclosure includes forming a first type epitaxial layer over a second type source/drain feature of a second type transistor, forming a second type epitaxial layer over a first type source/drain feature of a first type transistor, selectively depositing a first metal over the first type epitaxial layer to form a first metal layer while the first metal is substantially not deposited over the second type epitaxial layer over the first type source/drain feature, and depositing a second metal over the first metal layer and the second type epitaxial layer to form a second metal layer.

Claims (73)

1. A semiconductor structure, comprising:

an N-type transistor that includes:

a first fin structure comprising a source/drain region;

a first transition source/drain feature disposed over the source/drain region of the first fin structure;

a first source/drain feature disposed on the first transition source/drain feature; and

a metal germanide layer disposed on the first source/drain feature,

wherein the first transition source/drain feature and the first source/drain feature comprises silicon and an n-type dopant,

wherein a concentration of the n-type dopant in the first transition source/drain feature is smaller than a concentration of the n-type dopant in the first source/drain feature.

2. The semiconductor structure of claim 1 ,

wherein the metal germanide layer comprises germanium (Ge) and a first metal,

wherein the first metal comprises nickel (Ni), cobalt (Co), platinum (Pt), tungsten (W), ruthenium (Ru), or a combination thereof.

3. The semiconductor structure of claim 1 , where the N-type transistor further comprises:

a p-type epitaxial capping layer disposed between the metal germanide layer and the first source/drain feature, wherein the p-type epitaxial capping layer comprises silicon germanium or germanium.

4. The semiconductor structure of claim 1 , where the N-type transistor further comprises:

a metal cap disposed over the metal germanide layer, wherein the metal cap comprises titanium nitride.

5. The semiconductor structure of claim 4 , wherein the metal cap has a thickness between about 1 nm and about 3 nm.

6. The semiconductor structure of claim 4 , where the N-type transistor further comprises:

a contact metal layer disposed over the metal cap.

7. The semiconductor structure of claim 1 , further comprising:

a P-type transistor that includes:

a second fin structure comprising a source/drain region;

a second transition source/drain feature disposed over the source/drain region of the second fin structure;

a second source/drain feature disposed on the second transition source/drain feature; and

a metal silicide layer disposed on the second source/drain feature,

wherein the second transition source/drain feature and the second source/drain feature comprises silicon germanium and a p-type dopant,

wherein a concentration of the p-type dopant in the second transition source/drain feature is smaller than a concentration of the p-type dopant in the second source/drain feature.

8. The semiconductor structure of claim 7 , wherein a germanium content in the second transition source/drain feature is smaller than a germanium content in the second source/drain feature.

9. The semiconductor structure of claim 7 ,

wherein the metal silicide layer comprises silicon (Si) and a first metal,

wherein the first metal comprises nickel (Ni), cobalt (Co), platinum (Pt), tungsten (W), ruthenium (Ru), or a combination thereof.

10. The semiconductor structure of claim 7 , wherein the first fin structure and the second fin structure are spaced apart by an isolation feature.

11. A semiconductor structure, comprising:

a P-type transistor that includes:

a second fin structure comprising a source/drain region;

a second transition source/drain feature disposed over the source/drain region of the second fin structure;

a second source/drain feature disposed on the second transition source/drain feature; and

a metal silicide layer disposed on the second source/drain feature,

wherein the second transition source/drain feature and the second source/drain feature comprises silicon germanium and a p-type dopant,

wherein a concentration of the p-type dopant in the second transition source/drain feature is smaller than a concentration of the p-type dopant in the second source/drain feature.

12. The semiconductor structure of claim 11 , wherein a germanium content in the second transition source/drain feature is smaller than a germanium content in the second source/drain feature.

13. The semiconductor structure of claim 11 ,

wherein the metal silicide layer comprises silicon (Si) and a first metal,

wherein the first metal comprises nickel (Ni), cobalt (Co), platinum (Pt), tungsten (W), ruthenium (Ru), or a combination thereof.

14. The semiconductor structure of claim 11 , further comprising:

an N-type transistor that includes:

a first fin structure comprising a source/drain region;

a first transition source/drain feature disposed over the source/drain region of the first fin structure;

a first source/drain feature disposed on the first transition source/drain feature; and

a metal germanide layer disposed on the first source/drain feature,

wherein the first transition source/drain feature and the first source/drain feature comprises silicon and an n-type dopant,

wherein a concentration of the n-type dopant in the first transition source/drain feature is smaller than a concentration of the n-type dopant in the first source/drain feature.

15. The semiconductor structure of claim 14 ,

wherein the metal germanide layer comprises germanium (Ge) and a first metal,

wherein the first metal comprises nickel (Ni), cobalt (Co), platinum (Pt), tungsten (W), ruthenium (Ru), or a combination thereof.

16. The semiconductor structure of claim 14 , where the N-type transistor further comprises:

a p-type epitaxial capping layer disposed between the metal germanide layer and the first source/drain feature, wherein the p-type epitaxial capping layer comprises silicon germanium or germanium.

17. The semiconductor structure of claim 14 , wherein the first fin structure and the second fin structure are spaced apart by an isolation feature.

18. A semiconductor structure, comprising:

a substrate;

a first fin structure and a second fin structure disposed over the substrate;

an isolation feature disposed over the substrate and between the first fin structure and the second fin structure;

a first source/drain feature disposed on the first fin structure;

a second source/drain feature disposed on the second fin structure;

a metal germanide layer disposed on the first source/drain feature; and

a metal silicide layer disposed on the second source/drain feature,

wherein the first source/drain feature comprises silicon and an n-type dopant,

wherein the second source/drain feature comprises silicon germanium and a p-type dopant.

19. The semiconductor structure of claim 18 ,

wherein the metal germanide layer comprises germanium (Ge) and a first metal,

wherein the first metal comprises titanium (Ti), erbium (Er), yttrium (Y), ytterbium (Yb), europium (Eu), terbium (Tb), lutetium (Lu), thorium (Th), scandium (Sc), hafnium (Hf) zirconium (Zr), tantalum (Ta), or a combination thereof.

20. The semiconductor structure of claim 19 ,

wherein the metal silicide layer comprises silicon (Si) and a second metal,

wherein the second metal comprises nickel (Ni), cobalt (Co), platinum (Pt), tungsten (W), ruthenium (Ru), or a combination thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 27, 2022
From: CHU, PENG-WEI; WANG, SUNG-LI; OKUNO, YASUTOSHI
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 061557/0404 →
Continuity (3)
Continuation 17226822 · Apr 9, 2021
Division 16354259 · Mar 15, 2019
Related Publication 20220375797A1 · Nov 24, 2022