IP Library Granted Patent US 11,991,913
Granted Patent B2
US 11,991,913 · App. 17/862,926 · Granted May 21, 2024

Semiconductor device including detection electrodes applicable for a touch sensor

Inventors: Mitsuhide Miyamoto (Tokyo, JP); Hajime Akimoto (Tokyo, JP)
Assignee: Japan Display Inc.
H10K59/40G06F3/0412G06F3/04164G06F3/0446H10K50/11H10K50/17H10K50/171H10K50/8426H10K50/844H10K59/122H10K59/35H10K77/111G06F2203/04102Y02E10/549
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Quick Facts
Patent No.
US 11,991,913
App. No.
17/862,926
Granted
May 21, 2024
Kind
B2
Abstract

A sealing member containing conductive particles and disposed in a seal region is formed between a display panel and a touch panel. A laminated structure formed on the display panel includes a first detection lines. The first detection lines extend from the seal region to a connection region and are connected through the conductive particles to terminals of second detection lines formed on the touch panel. A peripheral edge of the organic barrier is located inward from the conductive particles of the sealing member. The above described structure can facilitate a work for connecting external lines such as FPC to the display panel and the touch panel. Further, the structure can secure stability of electrical connection between the external lines and the touch panel.

Claims (84)

1. A semiconductor device comprising:

a substrate;

a first insulator on the substrate;

a second insulator on the first insulator;

a plurality of detection electrodes, the plurality of detection electrodes overlapping the second insulator in a planar view;

a terminal on the substrate, the terminal located along an edge of the substrate;

a first detection line electrically connected to the terminal; and

a second detection line electrically connected to one of the plurality of detection electrodes, wherein

the first detection line and the second detection line are electrically connected with each other at a contact portion,

the contact portion is located between the plurality of detection electrodes and an edge of the second insulator in the planar view,

the substrate is configured to be folded back at a bent portion,

the bent portion is between the contact portion and the terminal, and

the first detection line and the first insulator overlap at the bent portion in the planar view.

2. The semiconductor device according to claim 1 , wherein

the second insulator comprises multiple layers stacked on each other.

3. The semiconductor device according to claim 2 , wherein the multiple layers comprise:

a first inorganic insulating layer;

a second inorganic insulating layer; and

an organic insulating layer between the first inorganic insulating layer and the second inorganic insulating layer, wherein

an edge of the organic insulating layer is located between the plurality of detection electrodes and an edge of the first inorganic insulating layer in the planar view,

the edge of the first inorganic insulating layer is located between the edge of the organic insulating layer and the edge of the substrate in the planar view,

the second inorganic insulating layer is in contact with the first inorganic insulating layer outside the edge of the organic insulating layer, and

the contact portion is located between the edge of the organic insulating layer and the edge of the second inorganic insulating layer in the planar view.

4. The semiconductor device according to claim 3 , wherein

the bent portion is between the edge of the organic insulating layer and the terminal.

5. The semiconductor device according to claim 3 , wherein

the bent portion is between the edge of the first inorganic insulating layer and the terminal.

6. The semiconductor device according to claim 1 , wherein

the terminal is at an opposite side of the plurality of detection electrodes.

7. A semiconductor device comprising:

a substrate;

a first insulating layer on the substrate;

a second insulating layer on the first insulating layer;

a plurality of detection electrodes, the plurality of detection electrodes overlapping the second insulating layer in a planar view;

a terminal on the substrate, the terminal located along an edge of the substrate;

a first detection line electrically connected to the terminal; and

a second detection line electrically connected to one of the plurality of detection electrodes, wherein

the first detection line and the second detection line are electrically connected with each other at a contact portion,

the contact portion is located between the plurality of detection electrodes and an edge of the second insulating layer in the planar view,

the substrate is configured to be folded back at a bent portion,

the bent portion is between the contact portion and the terminal, and

the first detection line and the first insulating layer overlap at the bent portion in the planar view.

8. The semiconductor device according to claim 7 , further comprising:

an organic insulating layer on the second insulating layer, and

a third insulating layer on the organic insulating layer, wherein

an edge of the organic insulating layer is located between the plurality of detection electrodes and an edge of the second insulating layer in the planar view,

the edge of the second insulating layer is located between the edge of the organic insulating layer and the edge of the substrate in the planar view,

the third insulating layer is in contact with the second insulating layer outside the edge of the organic insulating layer, and

the contact portion is located between the edge of the organic insulating layer and the edge of the third insulating layer in the planar view.

9. The semiconductor device according to claim 8 , wherein

the bent portion is between the edge of the organic insulating layer and the terminal.

10. The semiconductor device according to claim 8 , wherein

the bent portion is between the edge of the second insulating layer and the terminal.

11. The semiconductor device according to claim 7 , wherein

the terminal is at an opposite side of the plurality of detection electrodes.

12. A semiconductor device comprising:

a substrate;

a terminal on the substrate, the terminal located along an edge of the substrate;

a first detection line electrically connected to the terminal;

a first insulator between the substrate and the first detection line;

a second insulator on the substrate,

a plurality of detection electrodes, the plurality of detection electrodes overlapping the second insulator in a planar view; and

a second detection line electrically connected to one of the plurality of detection electrodes, wherein

the first detection line and the second detection line are electrically connected with each other at a contact portion,

the contact portion is located between the plurality of detection electrodes and an edge of the second insulator in the planar view,

the substrate is configured to be folded back at a bent portion,

the bent portion is between the contact portion and the terminal, and

the first detection line and the first insulator overlap at the bent portion in the plan view.

13. The semiconductor device according to claim 12 , wherein

the second insulator comprises multiple layers stacked on each other.

14. The semiconductor device according to claim 13 , wherein the multiple layers comprise:

a first inorganic insulating layer;

a second inorganic insulating layer; and

an organic insulating layer between the first inorganic insulating layer and the second inorganic insulating layer, wherein

an edge of the organic insulating layer is located between the plurality of detection electrodes and an edge of the first inorganic insulating layer in the planar view,

the edge of the first inorganic insulating layer is located between the edge of the organic insulating layer and the edge of the substrate in the planar view,

the second inorganic insulating layer is in contact with the first inorganic insulating layer outside the edge of the organic insulating layer, and

the contact portion is located between the edge of the organic insulating layer and the edge of the second inorganic insulating layer in the planar view.

15. The semiconductor device according to claim 14 , wherein

the bent portion is between the edge of the organic insulating layer and the terminal.

16. The semiconductor device according to claim 14 , wherein

the bent portion is between the edge of the first inorganic insulating layer and the terminal.

17. The semiconductor device according to claim 12 , wherein

the terminal is at an opposite side of the plurality of detection electrodes.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 072130/0313 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2022
From: MIYAMOTO, MITSUHIDE; AKIMOTO, HAJIME
To: JAPAN DISPLAY INC.
Reel/Frame 060486/0936 →
Priority Claims (1)
JP 2016-006329 · Jan 15, 2016 · national
Continuity (7)
Continuation 17173610 · Feb 11, 2021
Continuation 16856768 · Apr 23, 2020
Continuation 16453493 · Jun 26, 2019
Continuation 16139844 · Sep 24, 2018
Continuation 15833557 · Dec 6, 2017
Continuation 15336026 · Oct 27, 2016
Related Publication 20220344410A1 · Oct 27, 2022
Cited By (2)
US 12,436,635 US 12,699,491