Method of manufacturing a memory device comprising introducing a dopant into silicon oxide

1. A method of manufacturing a memory device including a silicon oxide and a variable resistance element electrically coupled to the silicon oxide, comprising:

introducing a dopant into the silicon oxide from a first surface of the silicon oxide by ion implantation;

thinning the silicon oxide by etching the first surface of the silicon oxide with an ion beam; and

removing a first part of the thinned silicon oxide to leave a second part of the thinned silicon oxide, after the thinning of the silicon oxide.

2. The method of claim 1 , further comprising:

forming a metal on the first surface of the silicon oxide after the introducing the dopant into the silicon oxide;

wherein the thinning of the silicon oxide comprises etching the metal with an ion beam before the etching of the first surface of the silicon oxide.

3. The method of claim 2 , wherein the thinning of the silicon oxide includes forming a conductor on part of the silicon oxide.

4. The method of claim 1 , further comprising:

forming a conductor or an insulator on the first surface of the silicon oxide before the thinning of the first surface of the silicon oxide,

wherein the thinning of the first surface of the silicon oxide includes removing the conductor or the insulator, and

the ion beam has an angle of 10° or more and 30° or less with respect to a plane in which the conductor or the insulator spreads.

5. The method of claim 1 , wherein the dopant includes arsenic, germanium, or antimony.

6. The method of claim 1 , wherein the variable resistance element has one of two resistances that differ from each other in a steady state.

7. The method of claim 1 , wherein the variable resistance element includes a first ferromagnetic layer, a second ferromagnetic layer, and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer.