Absorption enhancement structure to increase quantum efficiency of image sensor

1. An image sensor, comprising:

a substrate comprising a front-side surface and a back-side surface;

a photodetector disposed within the substrate; and

an absorption enhancement structure disposed along the back-side surface of the substrate and overlying the photodetector, wherein the absorption enhancement structure comprises a plurality of protrusions extending outwardly from the back-side surface of the substrate, and wherein each protrusion comprises slanted straight sidewalls overlying opposing curved sidewalls.

2. The image sensor of claim 1 , further comprising:

an upper dielectric structure overlying the absorption enhancement structure, wherein the upper dielectric structure comprises a plurality of convex protrusions disposed along a bottom surface of the upper dielectric structure, wherein each convex protrusion is spaced laterally between adjacent protrusions of the absorption enhancement structure.

3. The image sensor of claim 1 , wherein a width of each protrusion continuously increases at a first rate from a top of the protrusion to a first point below the top of the protrusion and continuously increases at a second rate from the first point towards a bottom of the protrusion, wherein the first rate is greater than the second rate.

4. The image sensor of claim 1 , wherein the slanted straight sidewalls meet at a point defining a top of the protrusions.

5. The image sensor of claim 1 , further comprising:

a deep trench isolation (DTI) structure disposed within the substrate, wherein the DTI structure extends from the back-side surface of the substrate to a point below an upper surface of the photodetector, wherein the DTI structure laterally encloses the photodetector.

6. The image sensor of claim 1 , further comprising:

an interconnect structure disposed along the front-side surface of the substrate, wherein the interconnect structure comprises an interconnect dielectric structure, a plurality of conductive vias, and a plurality of conductive wires.

7. The image sensor of claim 1 , further comprising:

a color filter overlying the absorption enhancement structure, wherein the color filter is configured to pass a first range of wavelengths while blocking a second range of wavelengths different from the first range of wavelengths; and

a micro-lens overlying the color filter and comprising a convex upper surface.

8. An integrated chip, comprising:

a substrate comprising a front-side surface and a back-side surface;

an interconnect structure disposed along the front-side surface of the substrate;

a photodetector disposed within the substrate;

an absorption enhancement structure disposed along the back-side surface of the substrate, wherein the absorption enhancement structure comprises a plurality of first protrusions and a corresponding plurality of recesses in the back-side surface that engagedly meet the first protrusions, wherein each first protrusion comprises slanted straight opposing sidewalls overlying opposing curved sidewalls; and

an upper dielectric structure overlying the back-side surface of the substrate, wherein the upper dielectric structure comprises a plurality of second protrusions disposed along a lower surface of the upper dielectric structure, wherein each second protrusion comprises a convex lower surface and fills a corresponding recess in the plurality of recesses, wherein an index of refraction of the upper dielectric structure is less than an index of refraction of the substrate.

9. The integrated chip of claim 8 , further comprising:

a grid structure overlying the back-side surface of the substrate, wherein the photodetector is spaced laterally between sidewalls of the grid structure.

10. An integrated chip, comprising:

a substrate having a front-side surface opposite a back-side surface;

a photodetector disposed within the substrate;

an isolation structure extending into the back-side surface of the substrate, wherein the photodetector is spaced between opposing sidewalls of the isolation structure; and

an upper dielectric structure disposed over the substrate, wherein the upper dielectric structure comprises a plurality of first protrusions that extends into the back-side surface of the substrate, wherein the first protrusions are spaced laterally between the opposing sidewalls of the isolation structure, wherein the first protrusions respectively comprise a curved lower surface that is disposed below the back-side surface of the substrate, wherein a top surface of the upper dielectric structure is substantially flat.

11. The integrated chip of claim 10 , wherein the first protrusions respectively comprise a straight sidewall above the curved lower surface.

12. The integrated chip of claim 11 , wherein a height of the curved lower surface is greater than a height of the straight sidewall.

13. The integrated chip of claim 10 , further comprising:

a grid structure on the back-side surface of the substrate, wherein the photodetector is spaced between opposing sidewalls of the grid structure, and wherein a top surface of the grid structure is aligned with the top surface of the upper dielectric structure.

14. The integrated chip of claim 13 , wherein a height of the grid structure is less than a height of the first protrusions.

15. The image sensor of claim 2 , wherein a top surface of the upper dielectric structure is substantially flat.

16. The image sensor of claim 2 , a height of the plurality of convex protrusions is greater than a distance between a top surface of the absorption enhancement structure and a top surface of the upper dielectric structure.

17. The integrated chip of claim 8 , further comprising:

a deep trench isolation (DTI) structure extending from the back-side surface of the substrate to a point below the back-side surface of the substrate, wherein the plurality of first protrusions and the photodetector are spaced between opposing sidewalls of the DTI structure.

18. The integrated chip of claim 17 , wherein a segment of the DTI structure abuts a first slanted straight sidewall of an individual protrusion in the plurality of first protrusions.

19. The integrated chip of claim 17 , further comprising:

a shallow trench isolation (STI) structure extending from the front-side surface of the substrate towards the DTI structure, wherein a height of the plurality of first protrusions is greater than a height of the STI structure.

20. The integrated chip of claim 17 , wherein a maximum width of a segment of the DTI structure is less than a maximum width of an individual protrusion in the plurality of first protrusions.