Hybrid converter with reduced inductor loss
View Patent ↗A hybrid converter achieves high efficiency with an inductor positioned at the lower current path that significantly decreases inductor loss by having the DC component of inductor current reduced. The circuit also features reduced inductance requirement by reducing the voltage swing blocked by the inductor. As a result, it turns to benefit of both efficiency improvement and better integration. Less voltage stress for switches is also an important advantage to switching loss reduction and switching frequency increase which in turns enables passive component size reduction. The circuit in this invention can be realized for both step-down and step-up power conversion as well as bidirectional power flow is available. For simplicity and cost, some of switches can be replaced with passive switches such as diodes which highly simplifies the converter circuit implementation.
1. A step down converter driving a load comprising in combination:
a voltage source having a first terminal and a second terminal;
a first series connection of first multiple capacitors connected in series with a first switch, the first switch connected to the first terminal of the voltage source;
a second series connection of second multiple capacitors connected in series with a second switch, wherein an end of the second multiple capacitors is connected to the first terminal of the voltage source;
an inductor having a first inductor terminal and a second inductor terminal, wherein:
the first inductor terminal is connected to the second terminal of the voltage source, and
the second inductor terminal is connected to a first capacitor of the first series connection of the first multiple capacitors and the first switch, and the second terminal of the inductor is also connected to the second series connection of the second multiple capacitors and the second switch;
third multiple switches each having a first switch terminal and a second switch terminal;
the first switch terminal of each of the third multiple switches connected to first common nodes of the first series connection of the first multiple capacitors and the first switch, the second switch terminal of each of the third multiple switches connected to second common nodes of the second series connection of the second multiple capacitors and the second switch and each of the third multiple switches positioned between the first common nodes or the second common nodes connecting either the same order of first common nodes of the first series connection of the first multiple capacitors and the first switch and second common nodes the second series connection of the second multiple capacitors and the second switch, or (N)th common nodes of the first series connection of the first multiple capacitors and the first switch and (N+1)th common node of the second series connection of the second multiple capacitors and the second switch; and
a load connected in parallel to a last capacitor of the second series connection of the second multiple capacitors and the second switch.