IP Library › Granted Patent US 12,008,370
Granted Patent B2
US 12,008,370 · App. 17/737,794 · Granted Jun 11, 2024

Method for preventing security attacks during speculative execution

Inventors: Mithuna Shamabhat Thottethodi (West Lafayette, IN); Terani N Vijaykumar (West Lafayette, IN)
Assignee: Purdue Research Foundation
G06F9/30043G06F9/3842G06F12/0875G06F2212/452
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Quick Facts
Patent No.
US 12,008,370
App. No.
17/737,794
Granted
Jun 11, 2024
Kind
B2
Abstract

A method of verifying authenticity of a speculative load instruction is disclosed which includes receiving a new speculative source-destination pair (PAIR), wherein the source represents a speculative load instruction and the destination represents an associated destination virtual memory location holding data to be loaded onto a register with execution of the source, checking the PAIR against one or more memory tables associated with non-speculative source-destination pairs, if the PAIR exists in the one or more memory tables, then executing the instruction associated with the source of the PAIR, if the PAIR does not exist, then i) waiting until the speculation of the source instruction has cleared as being non-speculative, ii) updating the one or more memory tables, and iii) executing the instruction associated with the source, and if the speculation of the source instruction of the PAIR does not clear as non-speculative, then the source is nullified.

Claims (29)

1. A method of verifying authenticity of a speculative load instruction, comprising:

receiving a new speculative source-destination pair (new speculative PAIR), wherein the source represents the speculative load instruction identified by an associated source virtual memory location where the speculative load instruction is located and the destination represents an associated destination virtual memory location holding data to be loaded onto a register with execution of the source;

checking the new speculative PAIR against one or more memory tables each having memory source-destination pairs associated with previous combinations of source-destination pairs that have successfully cleared as non-speculative source-destination pairs, wherein the memory source-destination pairs represent one or more virtual memory locations associated with the source and the destination;

if the new speculative PAIR exists in the one or more memory tables, executing the source of the new speculative PAIR;

if the new speculative PAIR does not exist in the one or more memory tables, i) waiting until speculation of the source of the new speculative PAIR has cleared as being non-speculative or one or more clock cycles later, ii) updating the one or more memory tables, wherein the updating is associated with inclusion of the new speculative PAIR as a new authentic pair, and iii) executing the source of the new speculative PAIR; and

if the speculation of the source of the new speculative PAIR does not clear as non-speculative, then the source of the new speculative PAIR is nullified.

2. The method of claim 1 , wherein the one or more memory tables includes a Speculative Memory Access Control Table (SMACT) housing authentic source-destination pairs.

3. The method of claim 1 , wherein the speculation of the source of the new speculative PAIR is cleared as non-speculative when the source of the new speculative PAIR reaches a head of a Reorder Buffer.

4. The method of claim 1 , wherein if the new speculative PAIR does not exist in the one or more memory tables, the step of executing the source of the new speculative PAIR is accomplished by using a replay.

5. The method of claim 1 , wherein the step of checking the new speculative PAIR against one or more memory tables consists of using the source of the new speculative PAIR to look up previous combinations of source-destination pairs that have successfully cleared as non-speculative source-destination pairs.

6. The method of claim 1 , wherein the step of checking the new speculative PAIR against one or more memory tables consists of using the destination of the new speculative PAIR to look up previous combinations of source-destination pairs that have successfully cleared as non-speculative source-destination pairs.

7. The method of claim 1 , wherein the memory source-destination pairs are represented as a coarse-grained set of locations augmented with a bit mask to identify one or more of finer-grain locations contained within the coarse-grained set.

8. The method of claim 1 , wherein each of the one or more memory table entries associated with the previous combinations of source-destination pairs that have successfully cleared as non-speculative source-destination pairs are amended via hardware or software control.

9. The method of claim 1 , wherein the source is i) a complete instruction or ii) a micro-operation included in a complex instruction comprising a plurality of micro-operations.

10. A method of verifying authenticity of a speculative load instruction, comprising:

receiving a new speculative source-destination pair (new speculative PAIR), wherein the source represents the speculative load instruction identified by an associated source physical memory location where the speculative load instruction is located and the destination represents an associated destination physical memory location holding data to be loaded onto a register with execution of the source;

checking the new speculative PAIR against one or more memory tables each having memory source-destination pairs associated with previous combinations of source-destination pairs that have successfully cleared as non-speculative source-destination pairs, wherein the memory source-destination pairs represent one or more virtual memory locations associated with the source and the destination;

if the new speculative PAIR exists in the one or more memory tables, executing the source of the new speculative PAIR;

if the new speculative PAIR does not exist in the one or more memory tables, i) waiting until speculation of the source of the new speculative PAIR has cleared as being non-speculative or one or more program counter clock cycles later, ii) updating the one or more memory tables, wherein the updating is associated with inclusion of the new speculative PAIR as a new authentic pair, and iii) executing the source of the new speculative PAIR; and

if the speculation of the source of the new speculative PAIR does not clear as non-speculative, then the source of the new speculative PAIR is nullified.

11. The method of claim 10 , wherein the one or more memory tables includes a Speculative Memory Access Control Table (SMACT) housing authentic source-destination pairs.

12. The method of claim 10 , wherein the speculation of the source of the new speculative PAIR is cleared as non-speculative when the source of the new speculative PAIR reaches a head of a Reorder Buffer.

13. The method of claim 10 , wherein if the new speculative PAIR does not exist in the one or more memory tables, the step of executing the source of the new speculative PAIR is accomplished by using a replay.

14. The method of claim 10 , wherein the step of checking the new speculative PAIR against one or more memory tables consists of using the source of the new speculative PAIR to look up previous combinations of source-destination pairs that have successfully cleared as non-speculative source-destination pairs.

15. The method of claim 10 , wherein the step of checking the new speculative PAIR against one or more memory tables consists of using the destination of the new speculative PAIR to look up previous combinations of source-destination pairs that have successfully cleared as non-speculative source-destination pairs.

16. The method of claim 10 , wherein each of the memory source-destination pairs is represented as a coarse-grained set of locations augmented with a bit mask to identify one or more finer-grain locations contained within the coarse-grained set.

17. The method of claim 10 , wherein each of the one or more memory table entries associated with the previous combinations of source-destination pairs that have successfully cleared as non-speculative source-destination pairs are amended via hardware or software control.

18. The method of claim 10 , wherein the source is i) a complete instruction or ii) a micro-operation included in a complex instruction comprising a plurality of micro-operations.

19. The method of claim 10 , wherein the associated source physical memory location and the associated destination physical memory location are presented as partial addresses and the step of checking the new speculative PAIR against one or more memory tables consists of finding a best match.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2023
From: THOTTETHODI, MITHUNA SHAMABHAT; VIJAYKUMAR, TERANI N.
To: PURDUE RESEARCH FOUNDATION
Reel/Frame 065163/0053 →
Continuity (4)
Provisional Application 63247789 · Sep 23, 2021
Provisional Application 63232777 · Aug 13, 2021
Provisional Application 63185122 · May 6, 2021
Related Publication 20220374235A1 · Nov 24, 2022
Cited By (3)
US 12,530,451 US 12,561,144 US 12,717,971