IP Library › Granted Patent US 12,009,207
Granted Patent B2
US 12,009,207 · App. 18/047,914 · Granted Jun 11, 2024

Gallium nitride device for high frequency and high power applications

Inventors: Puneet Srivastava (Wilmington, MA); James G. Fiorenza (Carlisle, MA)
Assignee: Analog Devices, Inc.
H01L21/0254H01L21/746H01L29/205H01L29/404H01L29/407H01L29/66462H01L29/778H01L29/7786H01L29/2003
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Quick Facts
Patent No.
US 12,009,207
App. No.
18/047,914
Granted
Jun 11, 2024
Kind
B2
Abstract

A semiconductor device includes a layer of a first semiconducting material, where the first semiconducting material is epitaxially grown to have a crystal structure of a first substrate. The semiconductor device further includes a layer of a second semiconducting material disposed adjacent to the layer of the first semiconducting material to form a heterojunction with the layer of the first semiconducting material. The semiconductor device further includes a first component that is electrically coupled to the heterojunction, and a second substrate that is bonded to the layer of the first semiconducting material.

Claims (48)

1. A method of manufacturing a semiconductor device, the method comprising:

receiving, obtaining, or providing a starting material that comprises:

a first substrate having a first crystal structure,

a layer of sacrificial material that has a second crystal structure based on the first crystal structure and is adjacent to the first substrate,

a first portion of a layer of a first semiconducting material that has a third crystal structure based on the first crystal structure and is adjacent to the layer of sacrificial material,

a layer of etch stop material on the first portion of the layer of the first semiconducting material,

growing a second portion of the layer of the first semiconducting material over the first portion of the layer of the first semiconducting material and the layer of etch stop material, the second portion having a specified height, wherein the etch stop material and the specified height are selected to determine a distance of a backside field plate formed in the layer of the first semiconducting material from a heterojunction, and

a layer of a second semiconducting material that forms the heterojunction with the layer of the first semiconducting material;

forming a first component of the semiconductor device, the first component electrically coupled to the heterojunction; and

removing the first substrate to expose a surface of the layer of the first semiconducting material.

2. The method of claim 1 , wherein the sacrificial material comprises graphene.

3. The method of claim 1 , wherein at least one of the layers of the starting material is grown epitaxially to the first substrate.

4. The method of claim 1 , further comprising forming, prior to a bonding, a second component of the semiconductor device that contacts the layer of the first semiconducting material without contacting the layer of the second semiconducting material.

5. The method of claim 4 , wherein the first component includes a first field plate, the method comprising:

aligning the backside field plate with the first field plate or a gate electrode.

6. The method according to claim 5 , wherein forming the backside field plate comprises one or more of:

doping a portion of the first semiconducting material to increase a density of minority charge carriers;

replacing the portion with a metal, a regrown ohmic contact, or a heterostructure; and

epitaxially growing a doped material.

7. The method of claim 1 , further comprising:

bonding, to a second substrate, an exposed surface of the layer of the first semiconducting material; and

forming at least one component of the semiconductor device after bonding the exposed surface to the second substrate.

8. The method of claim 1 , further comprising manufacturing a second semiconductor device using the first substrate.

9. A method of manufacturing a semiconductor device, the method comprising:

receiving, obtaining, or providing a starting material that comprises:

a first substrate having a first crystal structure,

a layer of sacrificial material that has a second crystal structure based on the first crystal structure and is adjacent to the first substrate,

a layer of a first semiconducting material that has a third crystal structure based on the first crystal structure and is adjacent to the layer of sacrificial material, and

a layer of a second semiconducting material that forms a heterojunction with the layer of the first semiconducting material;

forming a first component of the semiconductor device, the first component electrically coupled to the heterojunction;

removing the first substrate to expose a surface of the layer of the first semiconducting material; and

forming, prior to a bonding, a second component of the semiconductor device that contacts the layer of the first semiconducting material without contacting the layer of the second semiconducting material.

10. The method of claim 9 , further comprising:

growing a first portion of the layer of the first semiconducting material;

depositing a layer of etch stop material on the first portion of the layer of the first semiconducting material; and

growing a second portion of the layer of the first semiconducting material over the first portion and the etch stop material, the second portion being grown to a specified height;

wherein the etch stop material and the specified height are selected to determine a distance of a backside field plate formed in the first portion of the layer of the first semiconducting material from the heterojunction.

11. The method of claim 9 , wherein the sacrificial material comprises graphene.

12. The method of claim 9 , wherein at least one of the layers of the starting material is grown epitaxially to the first substrate.

13. The method of claim 9 , wherein the first component includes a first field plate, and the second component includes a second field plate, the second field plate being aligned with the first field plate or a gate electrode.

14. The method according to claim 13 , wherein forming the second field plate comprises one or more of:

doping a portion of the first semiconducting material to increase a density of minority charge carriers;

replacing the portion with a metal, a regrown ohmic contact, or a heterostructure; and

epitaxially growing a doped material.

15. The method of claim 9 , further comprising:

bonding, to a second substrate, an exposed surface of the layer of the first semiconducting material; and

forming at least one component of the semiconductor device after bonding the exposed surface to the second substrate.

16. The method of claim 9 , further comprising manufacturing a second semiconductor device using the first substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2022
From: SRIVASTAVA, PUNEET; FIORENZA, JAMES G.
To: ANALOG DEVICES, INC.
Reel/Frame 061473/0780 →
Continuity (3)
Division 15975917 · May 10, 2018
Provisional Application 62505586 · May 12, 2017
Related Publication 20230058073A1 · Feb 23, 2023
Cited By (1)
US 12,249,631