Method, system and computer program product for memory repair

1. A method, said method executed at least partially by a processor, comprising:

extracting, from at least one memory test on a memory block of a memory, a location of at least one fail bit to be repaired in the memory block;

obtaining an available repair resource in the memory for repairing the memory block;

checking, using machine learning, whether the at least one fail bit is unrepairable according to

the location of the at least one fail bit in the memory block, and

the available repair resource;

in response to said checking, using the machine learning, indicating that the at least one fail bit is not unrepairable, determining whether a Constraint Satisfaction Problem (CSP) containing a plurality of constraints is solvable, the plurality of constraints corresponding to

the location of the at least one fail bit in the memory block, and

the available repair resource;

in response to said determining indicating that the CSP is not solvable, marking the memory block as unrepairable or rejecting the memory; and

in response to said checking, using the machine learning, indicating that the at least one fail bit is unrepairable, marking the memory block as unrepairable or rejecting the memory, without making further determinations with respect to repairability of the memory block,

wherein the machine learning is performed based on a database containing unrepairable bit patterns and corresponding available repair resources.

2. The method of claim 1 , wherein

the CSP further contains at least one objective function to be optimized, and

a solution of the CSP corresponds to the at least one objective function being optimized.

3. The method of claim 1 , wherein

the plurality of constraints of the CSP comprises:

Σ i=1 m x i ≥m−x repair resource ,

Σ j=1 n y j ≥n−y repair resource , and

Σ k=1 h ( x i_k ·y j_k )=0,

where m is a number of word lines in the memory block,

n is a number of bit lines in the memory block,

h is a number of fail bits to be repaired in the memory block,

x repair resource is a number of redundant word lines available to repair the memory block,

y repair resource is a number of redundant bit lines available to repair the memory block,

x i is either 0 or 1 and corresponds to an i th word line among the m word lines, x i =0 corresponding to the i th word line being repaired by one of the redundant word lines, and x i =1 corresponding to the i th word line not being repaired,

y j is either 0 or 1 and corresponds to a i th bit line among the n bit lines, y j =0 corresponding to the j th bit line being repaired by one of the redundant bit lines, and y j =1 corresponding to the j th bit line not being repaired,

x i_k is x i corresponding to the word line coupled to a k th fail bit among the h fail bits, and

y j_k is y j corresponding to the bit line coupled to the k th fail bit.

4. The method of claim 3 , wherein

the CSP further contains maximizing Σ i=1 m and Σ j=1 n y j .

5. The method of claim 1 , further comprising:

extracting, from the at least one memory test, a location of at least one weak bit in the memory block;

in response to said determining indicating that the CSP is solvable, determining whether a remaining repair resource exists based on the available repair resource and a solution of the CSP;

in response to a determination that the remaining repair resource exists, solving a Constraint Optimization Problem (COP) containing

the plurality of constraints, and

an objective function to be optimized, the objective function corresponding to the location of the at least one weak bit in the memory block; and

repairing the at least one fail bit and the at least one weak bit using the available repair resource in accordance with a solution of the COP.

6. The method of claim 5 , wherein the at least one weak bit comprises a plurality of weak bits, said method further comprising:

assigning a plurality of different weights to the plurality of weak bits, the different weights corresponding to different weakness levels of the plurality of weak bits.

7. The method of claim 6 , wherein

the plurality of constraints comprises:

Σ i=1 m x i ≥m−x repair resource ,

Σ j=1 n y j ≥n−y repair resource , and

Σ k=1 h ( x i_k ·y j_k )=0,

the objective function comprises minimizing Σ l=1 s W l (x l ·y l ),

where m is a number of word lines in the memory block,

n is a number of bit lines in the memory block,

h is a number of fail bits to be repaired in the memory block,

s is a number of weak bits in the memory block,

x repair resource is a number of redundant word lines available to repair the memory block,

y repair resource is a number of redundant bit lines available to repair the memory block,

x i is either 0 or 1 and corresponds to an i th word line among the m word lines, x i = 0 corresponding to the i th word line being repaired by one of the redundant word lines, and x i =1 corresponding to the i th word line not being repaired,

y j is either 0 or 1 and corresponds to a j th bit line among the n bit lines, y j =0 corresponding to the j th bit line being repaired by one of the redundant bit lines, and y j =1 corresponding to the j th bit line not being repaired,

x′ i′ is either 0 or 1 and corresponds to an i′ th redundant word line, x′ i′ =0 corresponding to the i′ th redundant word line not being used to repair a word line, and x′ i′ =1 corresponding to the i′ th redundant word line being used to repair a word line,

y′ j′ is either 0 or 1 and corresponds to a j′ th redundant bit line, y′ j′ =0 corresponding to the j′ th redundant bit line not being used to repair a bit line, and y′ j′ =1 corresponding to the j′ th redundant bit line being used to repair a bit line,

x l is x i or x′ i′ corresponding to the word line or redundant word line coupled to an l th weak bit among the s weak bits,

y l is y j or y′ j′ corresponding to the bit line or redundant bit line coupled to the l th weak bit, and

W l is the weight assigned to the l th weak bit.

8. The method of claim 1 , further comprising:

in response to said determining indicating that the CSP is not solvable, adding the location of the at least one fail bit and the available repair resource to the database.

9. The method of claim 1 , further comprising:

in response to said determining indicating that the CSP is solvable, updating a heuristic of the CSP.

10. A system, comprising:

a memory testing device configured to perform at least one memory test on a memory block of a memory; and

a processor coupled to the memory testing device,

wherein the processor is configured to

extract, from the at least one memory test, a location of at least one fail bit to be repaired in the memory block,

obtain an available repair resource in the memory for repairing the memory block,

determine whether the at least one fail bit is unrepairable according to

the location of the at least one fail bit in the memory block, and

the available repair resource, and

in response to determining that the at least one fail bit is unrepairable,

add the location of the at least one fail bit and the available repair resource to a database containing unrepairable bit patterns and corresponding available repair resources, and

control the memory testing device to mark the memory block as unrepairable or to reject the memory.

11. The system of claim 10 , wherein the processor is further configured to

perform machine learning, based on the database, to obtain or update a machine learned function, and

for a subsequent memory test on a further memory block of a further memory,

extract, from the subsequent memory test, a location of at least one further fail bit to be repaired in the further memory block,

obtain a further available repair resource in the further memory for repairing the further memory block,

control marking the further memory block as unrepairable or rejecting the further memory, in response to the machine learned function indicating, based on the location of the at least one further fail bit and the further available repair resource, that the at least one further fail bit is unrepairable.

12. The system of claim 10 , wherein the processor is further configured to, in determining whether the at least one fail bit is unrepairable,

determine whether a Constraint Satisfaction Problem (CSP) containing a plurality of constraints is solvable, the plurality of constraints corresponding to

the location of the at least one fail bit in the memory block, and

the available repair resource, and

in response to a determination that the CSP is not solvable, determine that the at least one fail bit is unrepairable.

13. The system of claim 12 , wherein the processor is further configured to

extract, from the at least one memory test, a location of at least one weak bit in the memory block,

assign, based on the at least one memory test, a weight to the at least one weak bit,

in response to a determination that the CSP is solvable and has a solution satisfying the plurality of constraints, determine whether a remaining repair resource exists based on the available repair resource and the solution of the CSP, and

in response to a determination that the remaining repair resource exists, solve a Constraint Optimization Problem (COP) containing

the plurality of constraints, and

an objective function to be optimized, the objective function corresponding to the weight and the location of the at least one weak bit in the memory block.

14. The system of claim 13 , wherein

the memory testing device is further configured to repair the memory, and

the processor is further configured to control the memory testing device to

in response to a determination that the remaining repair resource does not exist, repair the at least one fail bit using the available repair resource in accordance with the solution of the CSP, and

in response to the determination that the remaining repair resource exists, repair the at least one fail bit and the at least one weak bit using the available repair resource in accordance with a solution of the COP.

15. A computer program product, comprising a non-transitory, computer-readable medium containing instructions therein which, when executed by a processor, cause the processor to

extract, from at least one memory test on a memory block of a memory,

a fail bit pattern of a plurality of fail bits to be repaired in the memory block, and

a weak bit pattern of a plurality of weak bits in the memory block, and

control repairing the memory based on

a solution of a Constraint Optimization Problem (COP) containing a plurality of constraints and an objective function, the solution of the COP satisfying the plurality of constraints, optimizing the objective function, and indicating how an available repair resource in the memory is allocated in a repair of the plurality of fail bits and one or more weak bits among the plurality of weak bits,

wherein the instructions, when executed by the processor, further cause the processor to

assign a plurality of different weights to the plurality of weak bits, the different weights corresponding to different weakness levels of the plurality of weak bits, and

formulate the objective function of the COP based on the plurality of weights and locations of the plurality of weak bits in the memory block.

16. The computer program product of claim 15 , wherein

the plurality of weak bits includes at least one weak bit in the available repair resource in the memory, and

the instructions, when executed by the processor, further cause the processor to assign, among the plurality of weights, at least one weight, which corresponds to a weakness level of the at least one weak bit in the available repair resource in the memory, to the at least one weak bit in the available repair resource in the memory.

17. The computer program product of claim 16 , wherein the instructions, when executed by the processor, further cause the processor to

formulate the objective function of the COP based on

the plurality of weights, including the at least one weight assigned to the at least one weak bit in the available repair resource in the memory, and

the locations of the plurality of weak bits in the memory block, including at least one location of the at least one weak bit in the available repair resource in the memory.

18. The computer program product of claim 15 , wherein the instructions, when executed by the processor, further cause the processor to

among the plurality of weights assigned to the plurality of weak bits,

assign a higher weight to a weak bit with a higher weakness level, and

assign a lower weight to a weak bit with a lower weakness level.

19. The computer program product of claim 18 , wherein the instructions, when executed by the processor, further cause the processor to

optimize the solution of the COP by optimizing the objective function of the COP, to preferentially repair the weak bit with the higher weight over the weak bit with the lower weight.

20. The method of claim 1 , wherein

in the database, each of the unrepairable bit patterns was previously determined or labeled to be unrepairable given the corresponding available repair resource.