Power supply circuit
A linear regulator adjusts an intermediate voltage V REGOUT at an output node such that an output voltage V OUT at an output terminal approaches a first target voltage V OUT(REF1) . A Dixon-type charge pump circuit enters a disable state when the output voltage V OUT is higher than a threshold voltage V TH(CP) determined to be lower than the first target voltage V OUT(REF1) , outputs the intermediate voltage V REGOUT at a first input node to the output node in the disable state, enters an enable state when the output voltage V OUT is lower than the threshold voltage V TH(CP) , and stabilizes the output voltage V OUT at the output terminal to a second target voltage V OUT(REF2) determined to be lower than the first target voltage V OUT(REF1) in the enable state.
1. A power supply circuit comprising:
an input terminal to be connected to receive an input voltage;
an output terminal to be connected to a load;
a linear regulator having an input node connected to the input terminal, and an output node, and structured to adjust an intermediate voltage at the output node such that an output voltage at the output terminal approaches a first target voltage; and
a Dixon-type charge pump circuit having a first input node connected to receive the intermediate voltage, a second input node connected to receive the input voltage, and an output node connected to the output terminal,
wherein the charge pump circuit is structured to enter a disable state when the output voltage is higher than a threshold voltage determined to be lower than the first target voltage, to output a voltage at the first input node to the output node in the disable state, to enter an enable state when the output voltage is lower than the threshold voltage, and to stabilize the output voltage to a second target voltage determined to be lower than the first target voltage in the enable state.
2. The power supply circuit according to claim 1 , wherein the charge pump circuit includes a first comparator having hysteresis for comparing a monitoring voltage corresponding to the output voltage with an upper threshold and a lower threshold corresponding to the second target voltage, and
the charge pump circuit repeats an operation period and a stop period in response to an output of the first comparator in the enable state.
3. The power supply circuit according to claim 1 , wherein the charge pump circuit includes:
a flying capacitor;
a driver circuit structured to alternately apply the input voltage and a ground voltage to a first end of the flying capacitor in the enable state,
a first rectifier element provided between the first input node and a second end of the flying capacitor, and
a second rectifier element provided between the second end of the flying capacitor and the output node.
4. The power supply circuit according to claim 3 , wherein the charge pump circuit further includes a second comparator structured to compare the output voltage with a voltage at the second end of the flying capacitor in a section in which the first end of the flying capacitor is low during a period in which the charge pump circuit is in the enable state, and structured to assert a stop signal when the output voltage is lower, and
the charge pump circuit enters the disabled state when the stop signal is asserted.
5. The power supply circuit according to claim 3 , wherein the first rectifier element is a first synchronization rectifier transistor structured to be switched between on and off states in the enable state, and to be in on state in the disabled state, and
the second rectifier element is a second synchronization rectifier transistor structured to be complementarily switched with the first synchronization rectifier transistor in the enable state, and to be in an on state in the disabled state.
6. The power supply circuit according to claim 3 , wherein the first rectifier element and the second rectifier element are diodes.
7. The power supply circuit according to claim 1 , wherein the charge pump circuit further includes a second comparator structured to compare the output voltage with the intermediate voltage, and to assert a stop signal when the output voltage is lower, and
the charge pump circuit enters the disabled state when the stop signal is asserted.
8. The power supply circuit according to claim 1 , wherein the charge pump circuit further includes a second comparator structured to compare the output voltage with a voltage based on the input voltage, and to assert a stop signal when the output voltage is lower, and
the charge pump circuit enters the disabled state when the stop signal is asserted.
9. The power supply circuit according to claim 1 , wherein the linear regulator includes
a first transistor having a source connected to the input node and a drain connected to the output node,
a second transistor having a source connected to the input node, a gate and a drain connected to a gate of the first transistor, and
an error amplifier connected to receive a reference voltage and a feedback voltage corresponding to the output voltage, and having an output connected to a gate of the first transistor and the gate and the drain of the second transistor.
10. The power supply circuit according to claim 1 , wherein the power supply circuit is integrated to one semiconductor substrate.