Memory sub-system cache extension to page buffers of a memory array
A system includes a memory device having an array of memory cells coupled with a plurality of page buffers. At least a portion of the array is configured as single-level cell memory. A processing device is coupled to the memory device and includes cache, the processing device to perform operations including: detecting demand for the cache during a memory operation requiring access to the single-level cell memory; and causing metadata associated with the memory operation to be stored in one or more page buffers of the plurality of page buffers, the one or more page buffers operating as an extension of the cache available to the processing device.
1. A system comprising:
a memory device comprising an array of memory cells coupled with a plurality of page buffers, wherein at least a portion of the array is configured as single-level cell memory; and
a processing device coupled to the memory device and comprising cache, the processing device to perform operations comprising:
detecting demand for the cache during an unmap operation requiring access to the single-level cell memory;
causing metadata associated with the unmap operation to be stored in one or more page buffers of the plurality of page buffers;
performing the unmap operation, including reading user data from and writing user data to different areas of the at least a portion of the array;
updating a plurality of logical-to-physical (L2P) translation tables of the metadata according to an unmap mask generated by the unmap operation; and
after completing the unmap operation, moving at least some of the metadata from the one or more page buffers to the cache.
2. The system of claim 1 , wherein the cache is at least one of static random access memory (SRAM) or tightly-coupled memory (TCM).
3. The system of claim 1 , wherein the demand for the cache is beyond a capacity of the cache.
4. The system of claim 1 , wherein the operations further comprise moving at least some of the metadata from one of the cache or the array of memory cells to the one or more page buffers.
5. The system of claim 1 , wherein the metadata comprises at least one of redundant array of independent NAND (RAIN)-generated data, redundant array of independent disks (RAID)-generated data, cached L2P tables, or cached flash translation layer (FTL) tables.
6. A method comprising:
detecting demand for a cache within a memory sub-system during an unmap operation requiring access to at least a portion of an array of memory cells, wherein the at least a portion of the array is configured as single-level cell memory;
causing metadata associated with the unmap operation to be stored in one or more page buffers of a plurality of page buffers of the at least a portion of the array;
performing the unmap operation, including reading user data from and writing user data to different areas of the at least a portion of the array;
updating a plurality of logical-to-physical (L2P) translation tables of the metadata according to an unmap mask generated by the unmap operation; and
after completing the unmap operation, moving at least some of the metadata from the one or more page buffers to the cache.
7. The method of claim 6 , wherein the cache is at least one of static random access memory (SRAM) or tightly-coupled memory (TCM) and the memory sub-system is a Universal Flash Storage (UFS) system.
8. The method of claim 6 , wherein the demand for the cache is beyond a capacity of the cache.
9. The method of claim 6 , further comprising moving at least some of the metadata from one of the cache or the array of memory cells to the one or more page buffers.
10. The method of claim 6 , wherein the metadata comprises at least one of redundant array of independent NAND (RAIN)-generated data, redundant array of independent disks (RAID)-generated data, cached L2P tables, or cached flash translation layer (FTL) tables.
11. A non-transitory computer-readable storage medium storing instructions, which when executed by a processing device of a memory sub-system, cause the processing device to perform operations comprising:
detecting demand for a cache within the processing device during an unmap operation requiring access to at least a portion of an array of memory cells, wherein the at least a portion of the array is configured as single-level cell memory; and
causing metadata associated with the unmap operation to be stored in one or more page buffers of a plurality of page buffers of the at least a portion of the array;
performing the unmap operation, including reading user data from and writing user data to different areas of the at least a portion of the array;
updating a plurality of logical-to-physical (L2P) translation tables of the metadata according to an unmap mask generated by the unmap operation; and
after completing the unmap operation, moving at least some of the metadata from the one or more page buffers to the cache.
12. The non-transitory computer-readable storage medium of claim 11 , wherein the demand for the cache is beyond a capacity of the cache.
13. The non-transitory computer-readable storage medium of claim 11 , wherein the operations further comprise moving at least some of the metadata from one of the cache or the array of memory cells to the one or more page buffers.
14. The non-transitory computer-readable storage medium of claim 11 , wherein the metadata comprises at least one of redundant array of independent NAND (RAIN)-generated data, redundant array of independent disks (RAID)-generated data, cached L2P tables, or cached flash translation layer (FTL) tables.