Method of executing programmable atomic unit resources within a multi-process system
Chiplet systems may include a memory controller that has programmable atomic units that execute programmable atomic transactions. These instructions are stored in one or more memory partitions of memory in the programmable atomic unit. Since the programmable atomic unit executes programmable atomic transactions that are customized for various processes, and since the programmable atomic unit is a physical resource shared by multiple processes, the processes need a way of both loading the programmable atomic unit memory with instructions and a method of calling those instructions. Disclosed are methods, systems, and devices for registering, calling, and virtualizing programmable atomic transactions.
1. A method comprising:
determining a first identifier of a programmable atomic transaction, the first identifier uniquely identifying the programmable atomic transaction within a first process executing on a hardware processor of a multi-process system, a same first identifier in a second process referring to a different programmable atomic transaction;
determining a second identifier based upon the first identifier and a mapping table, the second identifier uniquely identifying the programmable atomic transaction throughout the multi-process system;
issuing a request to a memory controller of the multi-process system to perform the programmable atomic transaction, the request including a memory location of the programmable atomic transaction, the memory location based upon the second identifier; and
receiving a response to the programmable atomic transaction.
2. The method of claim 1 , wherein the request includes a memory address, the memory address storing a value, the programmable atomic transaction performed on the value.
3. The method of claim 1 , wherein the request is issued using a request packet and is sent over a communication network.
4. The method of claim 3 , wherein the communication network is a chiplet communication network.
5. The method of claim 1 , further comprising registering the programmable atomic transaction, the registering including associating the first identifier with the second identifier and with the programmable atomic transaction.
6. The method of claim 1 , wherein the request further includes an argument for the programmable atomic transaction.
7. The method of claim 1 , further comprising:
determining that a second programmable atomic transaction is to be performed, the second programmable atomic transaction identified using the first identifier, the first identifier uniquely identifying the second programmable atomic transaction within the second process executing on the hardware processor of the multi-process system;
determining a third identifier different than the second identifier, the third identifier based upon the first identifier and the mapping table, the third identifier uniquely identifying the programmable atomic transaction throughout the multi-process system;
issuing a request to a memory controller to perform the second programmable atomic transaction, the request including a memory location of the second programmable atomic transaction; and
receiving a response to the second programmable atomic transaction.
8. A device comprising:
a hardware processor configured to:
determine a first identifier of a programmable atomic transaction, the first identifier uniquely identifying the programmable atomic transaction within a first process executing on a multi-process system, a same first identifier in a second process referring to a different programmable atomic transaction;
determine a second identifier based upon the first identifier and a mapping table, the second identifier uniquely identifying the programmable atomic transaction throughout the multi-process system;
issue a request to a memory controller of the multi-process system to perform the programmable atomic transaction, the request including a memory location of the programmable atomic transaction, the memory location based upon the second identifier; and
receive a response to the programmable atomic transaction.
9. The device of claim 8 , wherein the request includes a memory address, the memory address storing a value, the programmable atomic transaction performed on the value.
10. The device of claim 8 , wherein the request is issued using a request packet and is sent over a communication network.
11. The device of claim 10 , wherein the communication network is a chiplet communication network.
12. The device of claim 8 , wherein the hardware processor is further configured to register the programmable atomic transaction, including associating the first identifier with the second identifier and with the programmable atomic transaction.
13. The device of claim 8 , wherein the request further includes an argument for the programmable atomic transaction.
14. The device of claim 8 , wherein the hardware processor is further configured to:
determine that a second programmable atomic transaction is to be performed, the second programmable atomic transaction identified using the first identifier, the first identifier uniquely identifying the second programmable atomic transaction within the second process executing on the hardware processor of the multi-process system;
determine a third identifier different than the second identifier, the third identifier based upon the first identifier and the mapping table, the third identifier uniquely identifying the programmable atomic transaction throughout the multi-process system;
issue a request to a memory controller to perform the second programmable atomic transaction, the request including a memory location of the second programmable atomic transaction; and
receive a response to the second programmable atomic transaction.
15. A non-transitory machine-readable medium, the machine readable medium storing instructions, which when executed by a machine, cause the machine to perform operations comprising:
determining a first identifier of a programmable atomic transaction, the first identifier uniquely identifying the programmable atomic transaction within a first process executing on a hardware processor of a multi-process system, a same first identifier in a second process referring to a different programmable atomic transaction;
determining a second identifier based upon the first identifier and a mapping table, the second identifier uniquely identifying the programmable atomic transaction throughout the multi-process system;
issuing a request to a memory controller of the multi-process system to perform the programmable atomic transaction, the request including a memory location of the programmable atomic transaction, the memory location based upon the second identifier; and
receiving a response to the programmable atomic transaction.
16. The non-transitory machine-readable medium of claim 15 , wherein the request includes a memory address, the memory address storing a value, the programmable atomic transaction performed on the value.
17. The non-transitory machine-readable medium of claim 15 , wherein the request is issued using a request packet and is sent over a communication network.
18. The non-transitory machine-readable medium of claim 17 , wherein the communication network is a chiplet communication network.
19. The non-transitory machine-readable medium of claim 15 , wherein the operations further comprise registering the programmable atomic transaction, the registering including associating the first identifier with the second identifier and with the programmable atomic transaction.
20. The non-transitory machine-readable medium of claim 15 , wherein the request further includes an argument for the programmable atomic transaction.