Information recording method, apparatus, and device, and readable storage medium
View Patent ↗An information recording method, apparatus, and device, and a readable storage medium are provided. The method includes: when a server is started, determining a ring buffer in a Double Data Rate (DDR) of a Field-Programmable Gate Array (FPGA) acceleration card based on an OpenPower platform; determining a start address and an end address of the ring buffer and configuring the start address and the end address to the FPGA acceleration card; and during a running process of the server, recording preset debugging information to the ring buffer in real time, so as to perform fault location according to data in the ring buffer after a fault occurs in the server. According to the present application, during a running process of a server, preset debugging information is recorded using a DDR of an FPGA acceleration card.
1. An information recording method, comprising:
when a server is started, determining a ring buffer in a Double Data Rate (DDR) of a Field-Programmable Gate Array (FPGA) acceleration card based on an OpenPower platform, the FPGA acceleration card being in communication connection with the server;
determining a start address and an end address of the ring buffer, and configuring the start address and the end address to the FPGA acceleration card; and
during a running process of the server, recording preset debugging information to the ring buffer in real time, so as to perform fault location according to data in the ring buffer after a fault occurs in the server.
2. The information recording method according to claim 1 , wherein the step of determining a ring buffer in a DDR of an FPGA acceleration card based on an OpenPower platform comprises:
reading a size of a storage space of the DDR, calculating a size of a buffer memory space of the ring buffer according to a preset proportion, and allocating the ring buffer in the DDR according to the size of the buffer memory space.
3. The information recording method according to claim 1 , wherein after the start address and the end address are configured to the FPGA acceleration card, the method further comprises:
after the FPGA accelerator initializes the current data write address of the ring buffer, mapping the ring buffer to the server through Peripheral Component Interconnect express (PCIe).
4. The information recording method according to claim 3 , wherein the recording preset debugging information to the ring buffer in real time comprises:
recording the preset debugging information to the ring buffer in real time in the form of an American Standard Code for Information Interchange (ASCII), and controlling the current data write address to be updated accordingly.
5. The information recording method according to claim 4 , wherein after the current data write address is controlled to be updated accordingly, the method further comprises:
when the ring buffer overflows, performing a backup operation or a reset operation on the ring buffer according to preset configuration information.
6. The information recording method according to claim 5 , wherein the performing a backup operation on the ring buffer comprises:
determining a backup storage area in the DDR, and backing up data in the ring buffer to the backup storage area.
7. The information recording method according to claim 6 , wherein the performing fault location according to data in the ring buffer comprises:
mapping an address of the ring buffer or the backup storage area to a virtual address through a map function; and
reading data in the ring buffer or the backup storage area through the virtual address, and writing the data into a log.txt file, so as to view the character string data type through vim.
8. The information recording method according to claim 7 , the method further comprises:
when a fault occurs in the server, the driver maps the ring buffer and the backup storage area to a user-state program through a remmap interface of a char device node for displaying the data.
9. The information recording method according to claim 5 , the method further comprises:
presetting whether to perform the reset operation or the backup operation on the ring buffer in preset configuration information.
10. The information recording method according to claim 1 , the method further comprises:
after the server is started, the FPGA acceleration card is subjected to power-on self-test, and at the same time, confirms the size of the storage space of the DDR of the FPGA acceleration card and transfers the size of the storage space to the server through the bar address register;
after loading a driver, the server reads the bar address register to confirm the size of the storage space of the DDR.
11. The information recording method according to claim 1 , the method further comprises:
when a register interrupt processing function in the driver determines that the ring buffer overflows, the FPGA acceleration card generates a Message Signaled Interrupt (MSI) of the PCIE to notify the server, so that the server determines whether to perform the backup operation or the reset operation on the ring buffer according to specific requirements.
12. The information recording method according to claim 1 , wherein the FPGA acceleration card is in communication connection with the server based on Peripheral Component Interconnect express (PCIe).
13. An information recording device, comprising:
a memory, configured to store a computer program; and
a processor, configured to execute the computer program to:
when a server is started, determine a ring buffer in a Double Data Rate (DDR) of a Field-Programmable Gate Array (FPGA) acceleration card based on an OpenPower platform, the FPGA acceleration card being in communication connection with the server;
determine a start address and an end address of the ring buffer, and configure the start address and the end address to the FPGA acceleration card; and
during a running process of the server, record preset debugging information to the ring buffer in real time, so as to perform fault location according to data in the ring buffer after a fault occurs in the server.
14. The information recording device according to claim 13 , wherein the processor is further configured to execute the computer program to:
read a size of a storage space of the DDR, calculating a size of a buffer memory space of the ring buffer according to a preset proportion, and allocating the ring buffer in the DDR according to the size of the buffer memory space.
15. The information recording device according to claim 13 , wherein the processor is further configured to execute the computer program to:
after the FPGA accelerator initializes the current data write address of the ring buffer, map the ring buffer to the server through Peripheral Component Interconnect express (PCIe).
16. The information recording device according to claim 15 , wherein the processor is further configured to execute the computer program to:
record the preset debugging information to the ring buffer in real time in the form of an American Standard Code for Information Interchange (ASCII), and controlling the current data write address to be updated accordingly.
17. The information recording device according to claim 16 , wherein the processor is further configured to execute the computer program to:
when the ring buffer overflows, perform a backup operation or a reset operation on the ring buffer according to preset configuration information.
18. The information recording device according to claim 17 , wherein the processor is further configured to execute the computer program to:
determine a backup storage area in the DDR, and backing up data in the ring buffer to the backup storage area.
19. The information recording device according to claim 18 , wherein the processor is further configured to execute the computer program to:
map an address of the ring buffer or the backup storage area to a virtual address through a map function; and
read data in the ring buffer or the backup storage area through the virtual address, and write the data into a log.txt file, so as to view the character string data type through vim.
20. A non-transitory readable storage medium, storing a computer program, when the computer program is executed by a processor, cause the processor to:
when a server is started, determine a ring buffer in a Double Data Rate (DDR) of a Field-Programmable Gate Array (FPGA) acceleration card based on an OpenPower platform, the FPGA acceleration card being in communication connection with the server;
determine a start address and an end address of the ring buffer, and configure the start address and the end address to the FPGA acceleration card; and
during a running process of the server, record preset debugging information to the ring buffer in real time, so as to perform fault location according to data in the ring buffer after a fault occurs in the server.